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authorJon Derrick <jonathan.derrick@intel.com>2020-05-11 12:21:14 -0400
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-05-22 12:39:35 +0100
commitc88d19181771bd189147681ef38fc1533ebeff4c (patch)
treeb2b31f4dedfb65128ce5b1ed7324c8124fad97a5 /drivers/pci
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
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PCI: pci-bridge-emul: Fix PCIe bit conflicts
This patch fixes two bit conflicts in the pci-bridge-emul driver: 1. Bit 3 of Device Status (19 of Device Control) is marked as both Write-1-to-Clear and Read-Only. It should be Write-1-to-Clear. The Read-Only and Reserved bitmasks are shifted by 1 bit due to this error. 2. Bit 12 of Slot Control is marked as both Read-Write and Reserved. It should be Read-Write. Link: https://lore.kernel.org/r/20200511162117.6674-2-jonathan.derrick@intel.com Signed-off-by: Jon Derrick <jonathan.derrick@intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci-bridge-emul.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 4f4f54bc732e..faa414655f33 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -185,8 +185,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
* RO, the rest is reserved
*/
.w1c = GENMASK(19, 16),
- .ro = GENMASK(20, 19),
- .rsvd = GENMASK(31, 21),
+ .ro = GENMASK(21, 20),
+ .rsvd = GENMASK(31, 22),
},
[PCI_EXP_LNKCAP / 4] = {
@@ -226,7 +226,7 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC) << 16,
.ro = (PCI_EXP_SLTSTA_MRLSS | PCI_EXP_SLTSTA_PDS |
PCI_EXP_SLTSTA_EIS) << 16,
- .rsvd = GENMASK(15, 12) | (GENMASK(15, 9) << 16),
+ .rsvd = GENMASK(15, 13) | (GENMASK(15, 9) << 16),
},
[PCI_EXP_RTCTL / 4] = {