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author | Thierry Reding <treding@nvidia.com> | 2019-04-25 17:34:44 +0200 |
---|---|---|
committer | Kishon Vijay Abraham I <kishon@ti.com> | 2019-06-12 15:35:44 +0530 |
commit | e3888cda394c72dcfd450afec1121d9777a59805 (patch) | |
tree | 8054e4476ff253644b582638a7153fe56ca52a70 /drivers/phy | |
parent | aa5452f54b9f21213364baed25a0f8241aa09050 (diff) | |
download | linux-e3888cda394c72dcfd450afec1121d9777a59805.tar.gz linux-e3888cda394c72dcfd450afec1121d9777a59805.tar.bz2 linux-e3888cda394c72dcfd450afec1121d9777a59805.zip |
phy: tegra: xusb: Add Tegra210 PLL power supplies
The Tegra210 SoC has four inputs that consume power in order to supply
the PLLs that drive the various USB, PCI and SATA pads.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r-- | drivers/phy/tegra/xusb-tegra210.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c index 05bee32a3a4d..eb754baa8d71 100644 --- a/drivers/phy/tegra/xusb-tegra210.c +++ b/drivers/phy/tegra/xusb-tegra210.c @@ -2017,6 +2017,13 @@ static const struct tegra_xusb_padctl_ops tegra210_xusb_padctl_ops = { .hsic_set_idle = tegra210_hsic_set_idle, }; +static const char * const tegra210_xusb_padctl_supply_names[] = { + "avdd-pll-utmip", + "avdd-pll-uerefe", + "dvdd-pex-pll", + "hvdd-pex-pll-e", +}; + const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = { .num_pads = ARRAY_SIZE(tegra210_pads), .pads = tegra210_pads, @@ -2035,6 +2042,8 @@ const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc = { }, }, .ops = &tegra210_xusb_padctl_ops, + .supply_names = tegra210_xusb_padctl_supply_names, + .num_supplies = ARRAY_SIZE(tegra210_xusb_padctl_supply_names), }; EXPORT_SYMBOL_GPL(tegra210_xusb_padctl_soc); |