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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-09-29 14:15:17 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-10-20 11:37:38 +0200
commit3870a6f6ac255340767de64e71fbbfc54eb39403 (patch)
tree30b115c35a9db759081769f8b0bb9b7d0d72e538 /drivers/pinctrl/sh-pfc/pfc-r8a7796.c
parente2aad8464c0bf183be64c2120a37e87790dba367 (diff)
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pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
Move R-Car M3-W I/O voltage support over to the generic way to describe IOCTRL registers, which will be needed for suspend/resume support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7796.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7796.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index c7e0d26e307f..73ed9c74c137 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -5477,11 +5477,20 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ },
};
+enum ioctrl_regs {
+ POCCTRL,
+};
+
+static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
+ [POCCTRL] = { 0xe6060380, },
+ { /* sentinel */ },
+};
+
static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl)
{
int bit = -EINVAL;
- *pocctrl = 0xe6060380;
+ *pocctrl = pinmux_ioctrl_regs[POCCTRL].reg;
if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
bit = pin & 0x1f;
@@ -5798,6 +5807,7 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.cfg_regs = pinmux_config_regs,
.drive_regs = pinmux_drive_regs,
.bias_regs = pinmux_bias_regs,
+ .ioctrl_regs = pinmux_ioctrl_regs,
.pinmux_data = pinmux_data,
.pinmux_data_size = ARRAY_SIZE(pinmux_data),