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| author | Théo Lebrun <theo.lebrun@bootlin.com> | 2024-02-28 12:28:03 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2024-02-29 10:20:23 +0100 |
| commit | 53cf6b72e074864b94ade97dcb6f30b5ac1a82dc (patch) | |
| tree | 6f94db041e724462e46a1b96a4e52f58c9c65a6a /drivers/pinctrl | |
| parent | 6abd174c9c82ad49fd7efc63c348f43eb1612908 (diff) | |
| download | linux-53cf6b72e074864b94ade97dcb6f30b5ac1a82dc.tar.gz linux-53cf6b72e074864b94ade97dcb6f30b5ac1a82dc.tar.bz2 linux-53cf6b72e074864b94ade97dcb6f30b5ac1a82dc.zip | |
gpio: nomadik: fix offset bug in nmk_pmx_set()
Previously, the statement looked like:
slpm[x] &= ~BIT(g->grp.pins[i]);
Where:
- slpm is a unsigned int pointer;
- g->grp.pins[i] is a pin number. It can grow to more than 32.
The expected shift amount is a pin bank offset.
This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.
Fixes: dbfe8ca259e1 ("pinctrl/nomadik: implement pin multiplexing")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c index 7911353ac97d..4f7c4af4f93c 100644 --- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c +++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c @@ -1579,8 +1579,10 @@ static int nmk_pmx_set(struct pinctrl_dev *pctldev, unsigned function, * Then mask the pins that need to be sleeping now when we're * switching to the ALT C function. */ - for (i = 0; i < g->grp.npins; i++) - slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->grp.pins[i]); + for (i = 0; i < g->grp.npins; i++) { + unsigned int bit = g->grp.pins[i] % NMK_GPIO_PER_CHIP; + slpm[g->grp.pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(bit); + } nmk_gpio_glitch_slpm_init(slpm); } |