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| author | Linus Walleij <linus.walleij@linaro.org> | 2023-04-04 11:43:06 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2023-04-14 11:08:17 +0200 |
| commit | dcea54b7dad1b39757949d3e97a5eead161e8f0d (patch) | |
| tree | e5c633f6a2192817f8e1c3a563d2a7a1901564d3 /drivers/pinctrl | |
| parent | dccdc09199b78cf3e24ec6becb70eb9a3c039d24 (diff) | |
| download | linux-dcea54b7dad1b39757949d3e97a5eead161e8f0d.tar.gz linux-dcea54b7dad1b39757949d3e97a5eead161e8f0d.tar.bz2 linux-dcea54b7dad1b39757949d3e97a5eead161e8f0d.zip | |
pinctrl: npcm7xx: Convert to immutable irq_chip
Convert the driver to immutable irq-chip with a bit of
intuition.
I refactored the way the state container was accessed in
the irq_chip callbacks to all look the same and switch to
use irqd_to_hwirq() while we are at it.
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-4-503788a7f6e6@linaro.org
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index ff5bcea172e8..05d39f9111c2 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -82,7 +82,6 @@ struct npcm7xx_gpio { struct gpio_chip gc; int irqbase; int irq; - struct irq_chip irq_chip; u32 pinctrl_id; int (*direction_input)(struct gpio_chip *chip, unsigned int offset); int (*direction_output)(struct gpio_chip *chip, unsigned int offset, @@ -240,9 +239,9 @@ static void npcmgpio_irq_handler(struct irq_desc *desc) static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type) { - struct npcm7xx_gpio *bank = - gpiochip_get_data(irq_data_get_irq_chip_data(d)); - unsigned int gpio = BIT(d->hwirq); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct npcm7xx_gpio *bank = gpiochip_get_data(gc); + unsigned int gpio = BIT(irqd_to_hwirq(d)); dev_dbg(bank->gc.parent, "setirqtype: %u.%u = %u\n", gpio, d->irq, type); @@ -288,9 +287,9 @@ static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type) static void npcmgpio_irq_ack(struct irq_data *d) { - struct npcm7xx_gpio *bank = - gpiochip_get_data(irq_data_get_irq_chip_data(d)); - unsigned int gpio = d->hwirq; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct npcm7xx_gpio *bank = gpiochip_get_data(gc); + unsigned int gpio = irqd_to_hwirq(d); dev_dbg(bank->gc.parent, "irq_ack: %u.%u\n", gpio, d->irq); iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVST); @@ -299,23 +298,25 @@ static void npcmgpio_irq_ack(struct irq_data *d) /* Disable GPIO interrupt */ static void npcmgpio_irq_mask(struct irq_data *d) { - struct npcm7xx_gpio *bank = - gpiochip_get_data(irq_data_get_irq_chip_data(d)); - unsigned int gpio = d->hwirq; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct npcm7xx_gpio *bank = gpiochip_get_data(gc); + unsigned int gpio = irqd_to_hwirq(d); /* Clear events */ dev_dbg(bank->gc.parent, "irq_mask: %u.%u\n", gpio, d->irq); iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENC); + gpiochip_disable_irq(gc, gpio); } /* Enable GPIO interrupt */ static void npcmgpio_irq_unmask(struct irq_data *d) { - struct npcm7xx_gpio *bank = - gpiochip_get_data(irq_data_get_irq_chip_data(d)); - unsigned int gpio = d->hwirq; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct npcm7xx_gpio *bank = gpiochip_get_data(gc); + unsigned int gpio = irqd_to_hwirq(d); /* Enable events */ + gpiochip_enable_irq(gc, gpio); dev_dbg(bank->gc.parent, "irq_unmask: %u.%u\n", gpio, d->irq); iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENS); } @@ -323,7 +324,7 @@ static void npcmgpio_irq_unmask(struct irq_data *d) static unsigned int npcmgpio_irq_startup(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - unsigned int gpio = d->hwirq; + unsigned int gpio = irqd_to_hwirq(d); /* active-high, input, clear interrupt, enable interrupt */ dev_dbg(gc->parent, "startup: %u.%u\n", gpio, d->irq); @@ -341,6 +342,8 @@ static const struct irq_chip npcmgpio_irqchip = { .irq_mask = npcmgpio_irq_mask, .irq_set_type = npcmgpio_set_irq_type, .irq_startup = npcmgpio_irq_startup, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; /* pinmux handing in the pinctrl driver*/ @@ -1906,7 +1909,6 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) return -EINVAL; } pctrl->gpio_bank[id].irq = ret; - pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK; pctrl->gpio_bank[id].pinctrl_id = args.args[0]; pctrl->gpio_bank[id].gc.base = args.args[1]; @@ -1941,7 +1943,7 @@ static int npcm7xx_gpio_register(struct npcm7xx_pinctrl *pctrl) struct gpio_irq_chip *girq; girq = &pctrl->gpio_bank[id].gc.irq; - girq->chip = &pctrl->gpio_bank[id].irq_chip; + gpio_irq_chip_set_chip(girq, &npcmgpio_irqchip); girq->parent_handler = npcmgpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(pctrl->dev, 1, |