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authorPeng Fan <peng.fan@nxp.com>2020-07-30 14:46:09 +0800
committerPhilipp Zabel <p.zabel@pengutronix.de>2020-09-23 14:25:31 +0200
commitf008c403270cc2b830868ec0967a3cac7f18a984 (patch)
treec8543023c51b70ec9ea0b2540de6e218b1018721 /drivers/reset
parentcbc111d1552ee1364a16cfd1162dd9e8f969101e (diff)
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reset: imx7: add the cm4 reset for i.MX8MQ
Add the cm4 reset used by the remoteproc driver Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/reset')
-rw-r--r--drivers/reset/reset-imx7.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 9832033a702a..b60534a1e0ef 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -178,6 +178,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
[IMX8MQ_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) },
[IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
[IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
+ [IMX8MQ_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) },
+ [IMX8MQ_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) },
+ [IMX8MQ_RESET_M4_ENABLE] = { SRC_M4RCR, BIT(3) },
[IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
@@ -238,6 +241,7 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
+ case IMX8MQ_RESET_M4_ENABLE:
value = assert ? 0 : bit;
break;
}