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| author | Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> | 2022-08-19 17:49:05 +0800 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@linux-watchdog.org> | 2022-10-02 12:55:33 +0200 |
| commit | 19f04459f019743310d17e8d426ff5d1a4b81041 (patch) | |
| tree | 0519eef3a0d91a469f492f6b0c8c980ea8f211f9 /drivers/soc/rockchip | |
| parent | 891862d5ba11da739ac796221ff64e4ccf5a275f (diff) | |
| download | linux-19f04459f019743310d17e8d426ff5d1a4b81041.tar.gz linux-19f04459f019743310d17e8d426ff5d1a4b81041.tar.bz2 linux-19f04459f019743310d17e8d426ff5d1a4b81041.zip | |
watchdog: aspeed_wdt: Reorder output signal register configuration
If the output driving type is push-pull mode, the output
polarity should be selected in advance. Otherwise, an unexpected
value will be output at the moment of changing to push-pull mode.
Thus, output polarity, WDT18[31], must be configured before
changing driving type, WDT18[30].
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Bonnie Lo <Bonnie_Lo@wiwynn.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220819094905.1962513-1-chin-ting_kuo@aspeedtech.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Diffstat (limited to 'drivers/soc/rockchip')
0 files changed, 0 insertions, 0 deletions