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authorShawn Lin <shawn.lin@rock-chips.com>2018-03-09 09:51:03 +0800
committerHeiko Stuebner <heiko@sntech.de>2018-03-13 13:06:15 +0100
commit60cf09e45fbcbbbb3162f02e0923a25ae7f5627e (patch)
treefa29a28ee11a6ea776d8fe33dab7333adadf7077 /drivers/spi/spi-efm32.c
parent4bf59902b50012b1dddeeaa23b217d9c4956cdda (diff)
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clk: rockchip: Restore the clock phase after the rate was changed
There are many factors affecting the clock phase, including clock rate, temperature, logic voltage and silicon process, etc. But clock rate is the most significant one here, and the driver should be aware of the change of the clock rate. As mmc controller need a fixed phase after tuning was completed, at least before explicitly doing re-tune, so this patch try to restore the clock phase by monitoring the event of rate change. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/spi/spi-efm32.c')
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