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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-01-02 14:38:21 +0100
committerMark Brown <broonie@kernel.org>2020-01-07 22:33:47 +0000
commit9815ed8714d26560d09b41f906b96a97f9bc3e3f (patch)
tree07ab9663123f440cd31f02c2f1191e163fc180e0 /drivers/spi
parent8f2344fa7f54382eeaf4b65d70c74b0b44df7a6b (diff)
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spi: rspi: Add support for multiple native chip selects
RSPI variants on some SuperH or R-Mobile SoCs support multiple native chip selects. Add support for this by configuring the SSL Assert Signal Setting. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200102133822.29346-6-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-rspi.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 9eabef3d6cc4..2f5a856a9319 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -159,7 +159,7 @@
#define SPCMD_SPIMOD_DUAL SPCMD_SPIMOD0
#define SPCMD_SPIMOD_QUAD SPCMD_SPIMOD1
#define SPCMD_SPRW 0x0010 /* SPI Read/Write Access (Dual/Quad) */
-#define SPCMD_SSLA_MASK 0x0030 /* SSL Assert Signal Setting (RSPI) */
+#define SPCMD_SSLA(i) ((i) << 4) /* SSL Assert Signal Setting */
#define SPCMD_BRDV_MASK 0x000c /* Bit Rate Division Setting */
#define SPCMD_CPOL 0x0002 /* Clock Polarity Setting */
#define SPCMD_CPHA 0x0001 /* Clock Phase Setting */
@@ -933,6 +933,9 @@ static int rspi_prepare_message(struct spi_controller *ctlr,
if (spi->mode & SPI_CPHA)
rspi->spcmd |= SPCMD_CPHA;
+ /* Configure slave signal to assert */
+ rspi->spcmd |= SPCMD_SSLA(spi->chip_select);
+
/* CMOS output mode and MOSI signal from previous transfer */
rspi->sppcr = 0;
if (spi->mode & SPI_LOOP)