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authorPalle Christensen <palle.christensen@microsemi.com>2018-03-15 13:47:05 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-03-19 19:46:51 +0100
commit6efb21d6d0e7b2c90a8a813c4bac85097357ce91 (patch)
treee9360089caaeb4496db0aae42de2f9cbdce37774 /drivers/staging/mt29f_spinand
parent2ebd9ec4ac390fc6ca31e928ca56df76f4fa177c (diff)
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staging:mt29f_spinand: MT29F2G failing as only 16 bits used for addressing.
For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits are necessary to address the correct page. Signed-off-by: Palle Christensen <palle.christensen@microsemi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt29f_spinand')
-rw-r--r--drivers/staging/mt29f_spinand/mt29f_spinand.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/staging/mt29f_spinand/mt29f_spinand.c b/drivers/staging/mt29f_spinand/mt29f_spinand.c
index 264ad362d858..d20284b49557 100644
--- a/drivers/staging/mt29f_spinand/mt29f_spinand.c
+++ b/drivers/staging/mt29f_spinand/mt29f_spinand.c
@@ -316,6 +316,7 @@ static int spinand_read_page_to_cache(struct spi_device *spi_nand, u16 page_id)
row = page_id;
cmd.cmd = CMD_READ;
cmd.n_addr = 3;
+ cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
cmd.addr[1] = (u8)((row & 0xff00) >> 8);
cmd.addr[2] = (u8)(row & 0x00ff);
@@ -464,6 +465,7 @@ static int spinand_program_execute(struct spi_device *spi_nand, u16 page_id)
row = page_id;
cmd.cmd = CMD_PROG_PAGE_EXC;
cmd.n_addr = 3;
+ cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
cmd.addr[1] = (u8)((row & 0xff00) >> 8);
cmd.addr[2] = (u8)(row & 0x00ff);
@@ -579,6 +581,7 @@ static int spinand_erase_block_erase(struct spi_device *spi_nand, u16 block_id)
row = block_id;
cmd.cmd = CMD_ERASE_BLK;
cmd.n_addr = 3;
+ cmd.addr[0] = (u8)((row & 0xff0000) >> 16);
cmd.addr[1] = (u8)((row & 0xff00) >> 8);
cmd.addr[2] = (u8)(row & 0x00ff);