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authorAndres Salomon <dilinger@queued.net>2011-07-21 20:37:55 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-08-23 14:37:08 -0700
commit1b995ac22b53c6176e61a38558c8a8d16be24b69 (patch)
tree9b74649ca70196572f31d820ff202a0067336ee3 /drivers/staging/olpc_dcon
parent24e2617050d9ceb2cd8200982249529c81c5f310 (diff)
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staging: olpc_dcon: drop support for DCON v1
The v1 DCONs only existed for XO-1 prototypes (and even then, very very early prototypes). Drop support for v1 DCON. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/olpc_dcon')
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.c31
1 files changed, 10 insertions, 21 deletions
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.c b/drivers/staging/olpc_dcon/olpc_dcon.c
index cf4b45440f67..ae18cd455fd9 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.c
+++ b/drivers/staging/olpc_dcon/olpc_dcon.c
@@ -88,29 +88,18 @@ static int dcon_hw_init(struct dcon_priv *dcon, int is_init)
}
if (ver < 0xdc02) {
- /* Initialize the DCON registers */
-
- /* Start with work-arounds for DCON ASIC */
- i2c_smbus_write_word_data(client, 0x4b, 0x00cc);
- i2c_smbus_write_word_data(client, 0x4b, 0x00cc);
- i2c_smbus_write_word_data(client, 0x4b, 0x00cc);
- i2c_smbus_write_word_data(client, 0x0b, 0x007a);
- i2c_smbus_write_word_data(client, 0x36, 0x025c);
- i2c_smbus_write_word_data(client, 0x37, 0x025e);
-
- /* Initialise SDRAM */
-
- i2c_smbus_write_word_data(client, 0x3b, 0x002b);
- i2c_smbus_write_word_data(client, 0x41, 0x0101);
- i2c_smbus_write_word_data(client, 0x42, 0x0101);
- } else {
- /* SDRAM setup/hold time */
- i2c_smbus_write_word_data(client, 0x3a, 0xc040);
- i2c_smbus_write_word_data(client, 0x41, 0x0000);
- i2c_smbus_write_word_data(client, 0x41, 0x0101);
- i2c_smbus_write_word_data(client, 0x42, 0x0101);
+ dev_err(&dcon->client->dev,
+ "DCON v1 is unsupported, giving up..\n");
+ rc = -ENODEV;
+ goto err;
}
+ /* SDRAM setup/hold time */
+ i2c_smbus_write_word_data(client, 0x3a, 0xc040);
+ i2c_smbus_write_word_data(client, 0x41, 0x0000);
+ i2c_smbus_write_word_data(client, 0x41, 0x0101);
+ i2c_smbus_write_word_data(client, 0x42, 0x0101);
+
/* Colour swizzle, AA, no passthrough, backlight */
if (is_init) {
dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE |