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author | Hans de Goede <hdegoede@redhat.com> | 2018-06-10 16:01:20 +0200 |
---|---|---|
committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-07-26 13:54:15 +0300 |
commit | 5741022cbdf3616a9def13b15ab5667a36c65706 (patch) | |
tree | 05f7be4d5b79a5c0340f3112436bfc504bcf8134 /drivers/usb/dwc3/dwc3-pci.c | |
parent | ee9a4ae7dcf19bfe13eb7ae5696ea0405de1f089 (diff) | |
download | linux-5741022cbdf3616a9def13b15ab5667a36c65706.tar.gz linux-5741022cbdf3616a9def13b15ab5667a36c65706.tar.bz2 linux-5741022cbdf3616a9def13b15ab5667a36c65706.zip |
usb: dwc3: pci: Add GPIO lookup table on platforms without ACPI GPIO resources
Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead
they require an external ULPI phy for device-mode.
Only some BYT devices have an external phy, but even on those devices
device-mode is not working because the dwc3 does not see the phy.
The problem is that the ACPI fwnode for the dwc3 does not contain the
expected GPIO resources for the GPIOs connected to the chip-select and
reset pins of the phy.
I've found the workaround which some Android x86 kernels use for this:
https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c
Which boils down to hardcoding the GPIOs for these devices.
The good news it that all boards (*) use the same GPIOs.
This commit fixes the ULPI phy not woring by adding a gpiod_lookup_table
call which adds a hardcoded mapping for BYT devices. Note that the mapping
added by gpiod_add_lookup_table is a fallback mapping, so boards which
properly provide GPIO resources in the ACPI firmware-node resources
will not use this.
*) Except for the first revision of the evalulation-kit, which normal users
don't have
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc3/dwc3-pci.c')
-rw-r--r-- | drivers/usb/dwc3/dwc3-pci.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index 80f5dc691038..5c175f839efd 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -16,6 +16,7 @@ #include <linux/pm_runtime.h> #include <linux/platform_device.h> #include <linux/gpio/consumer.h> +#include <linux/gpio/machine.h> #include <linux/acpi.h> #include <linux/delay.h> @@ -64,6 +65,15 @@ static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { { }, }; +static struct gpiod_lookup_table platform_bytcr_gpios = { + .dev_id = "0000:00:16.0", + .table = { + GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH), + {} + }, +}; + static int dwc3_pci_quirks(struct dwc3_pci *dwc) { struct platform_device *dwc3 = dwc->dwc3; @@ -125,6 +135,13 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) dev_dbg(&pdev->dev, "failed to add mapping table\n"); /* + * A lot of BYT devices lack ACPI resource entries for + * the GPIOs, add a fallback mapping to the reference + * design GPIOs which all boards seem to use. + */ + gpiod_add_lookup_table(&platform_bytcr_gpios); + + /* * These GPIOs will turn on the USB2 PHY. Note that we have to * put the gpio descriptors again here because the phy driver * might want to grab them, too. @@ -239,6 +256,7 @@ static void dwc3_pci_remove(struct pci_dev *pci) { struct dwc3_pci *dwc = pci_get_drvdata(pci); + gpiod_remove_lookup_table(&platform_bytcr_gpios); #ifdef CONFIG_PM cancel_work_sync(&dwc->wakeup_work); #endif |