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author | Biju Das <biju.das@bp.renesas.com> | 2018-08-07 08:57:02 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2018-08-29 10:46:41 +0200 |
commit | 496069b87eea631274c2c35fb6f8c45ad838436b (patch) | |
tree | 3586d61c88443c522833723fd42285dcf0c52a5e /drivers | |
parent | a419a3d92aab88dba1bf151f98f93c49d0e34206 (diff) | |
download | linux-496069b87eea631274c2c35fb6f8c45ad838436b.tar.gz linux-496069b87eea631274c2c35fb6f8c45ad838436b.tar.bz2 linux-496069b87eea631274c2c35fb6f8c45ad838436b.zip |
gpio: rcar: Add GPIO hole support
GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in the
range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins between GP3_17
to GP3_26 are unused. Add support for handling unused GPIO's.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/gpio-rcar.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 55cc61086d99..3c82bb3c2030 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -321,6 +321,9 @@ static void gpio_rcar_set_multiple(struct gpio_chip *chip, unsigned long *mask, u32 val, bankmask; bankmask = mask[0] & GENMASK(chip->ngpio - 1, 0); + if (chip->valid_mask) + bankmask &= chip->valid_mask[0]; + if (!bankmask) return; @@ -558,6 +561,9 @@ static int gpio_rcar_resume(struct device *dev) u32 mask; for (offset = 0; offset < p->gpio_chip.ngpio; offset++) { + if (!gpiochip_line_is_valid(&p->gpio_chip, offset)) + continue; + mask = BIT(offset); /* I/O pin */ if (!(p->bank_info.iointsel & mask)) { |