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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-07-20 14:41:11 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-07-27 14:05:04 +0200 |
| commit | a0d6de9bdf8d66be458fcda5898a799778169c60 (patch) | |
| tree | 44f989afb4368cef9c693fd7414e4abd7882c329 /drivers | |
| parent | 38b0e5071eca4db618e796a2f1dbad3b20c01358 (diff) | |
| download | linux-a0d6de9bdf8d66be458fcda5898a799778169c60.tar.gz linux-a0d6de9bdf8d66be458fcda5898a799778169c60.tar.bz2 linux-a0d6de9bdf8d66be458fcda5898a799778169c60.zip | |
pinctrl: sunxi: Use common functions to change irq_chip and handler
The current code uses some custom variable affectations, while we have
common functions to do exactly that. Move to the common functions.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 3e905480ec56..c804f3832332 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -588,7 +588,6 @@ static void sunxi_pinctrl_irq_release_resources(struct irq_data *d) static int sunxi_pinctrl_irq_set_type(struct irq_data *d, unsigned int type) { struct sunxi_pinctrl *pctl = irq_data_get_irq_chip_data(d); - struct irq_desc *desc = container_of(d, struct irq_desc, irq_data); u32 reg = sunxi_irq_cfg_reg(d->hwirq); u8 index = sunxi_irq_cfg_offset(d->hwirq); unsigned long flags; @@ -615,16 +614,17 @@ static int sunxi_pinctrl_irq_set_type(struct irq_data *d, unsigned int type) return -EINVAL; } - if (type & IRQ_TYPE_LEVEL_MASK) { - d->chip = &sunxi_pinctrl_level_irq_chip; - desc->handle_irq = handle_fasteoi_irq; - } else { - d->chip = &sunxi_pinctrl_edge_irq_chip; - desc->handle_irq = handle_edge_irq; - } - spin_lock_irqsave(&pctl->lock, flags); + if (type & IRQ_TYPE_LEVEL_MASK) + __irq_set_chip_handler_name_locked(d->irq, + &sunxi_pinctrl_level_irq_chip, + handle_fasteoi_irq, NULL); + else + __irq_set_chip_handler_name_locked(d->irq, + &sunxi_pinctrl_edge_irq_chip, + handle_edge_irq, NULL); + regval = readl(pctl->membase + reg); regval &= ~(IRQ_CFG_IRQ_MASK << index); writel(regval | (mode << index), pctl->membase + reg); |