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| author | Xenia Ragiadakou <burzalodowa@gmail.com> | 2013-09-20 19:45:53 +0300 |
|---|---|---|
| committer | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2013-10-09 16:27:13 -0700 |
| commit | e459933967aef650c25b3cbe1ff88c8047cac543 (patch) | |
| tree | f9e8e397b9d926dc0894668a7a1a029b65926405 /drivers | |
| parent | 455f58925247e8a1a1941e159f3636ad6ee4c90b (diff) | |
| download | linux-e459933967aef650c25b3cbe1ff88c8047cac543.tar.gz linux-e459933967aef650c25b3cbe1ff88c8047cac543.tar.bz2 linux-e459933967aef650c25b3cbe1ff88c8047cac543.zip | |
xhci: fix write to USB3_PSSEN and XUSB2PRM pci config registers
The function pci_write_config_dword() sets the appropriate byteordering
internally so the value argument should not be converted to little-endian.
This bug was found by sparse.
This patch is not suitable for stable. Since cpu_to_lei32 is a no-op on
little endian systems, this bug would only affect big endian Intel
systems with the EHCI to xHCI port switchover, which are non-existent,
AFAIK.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/usb/host/pci-quirks.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index 2c76ef1320ea..08ef2829a7e2 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c @@ -799,7 +799,7 @@ void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) * switchable ports. */ pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, - cpu_to_le32(ports_available)); + ports_available); pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, &ports_available); @@ -821,7 +821,7 @@ void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev) * host. */ pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, - cpu_to_le32(ports_available)); + ports_available); pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, &ports_available); |