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authorH. Peter Anvin <hpa@zytor.com>2006-06-19 15:35:36 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-19 15:35:36 +0100
commit441ff855f3edf5d355bea30f557bbed6bcd42c6c (patch)
tree6327490a1106630deb7fc20255c61072c85a943f /include/asm-arm/byteorder.h
parent5e6423871772b89120c9fb356d2eabb67fea60bd (diff)
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[ARM] Fix byte order macros for Thumb
The byte order functions are visible to userspace. Unfortunately, __arch_swab32() contains an assembly instruction which is invalid when compiling for Thumb. This reverts to the C version when compiling for Thumb. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/byteorder.h')
-rw-r--r--include/asm-arm/byteorder.h10
1 files changed, 6 insertions, 4 deletions
diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h
index 17eaf8bdf092..e6f7fcdc73b0 100644
--- a/include/asm-arm/byteorder.h
+++ b/include/asm-arm/byteorder.h
@@ -22,16 +22,18 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
{
__u32 t;
- if (__builtin_constant_p(x)) {
- t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
- } else {
+#ifndef __thumb__
+ if (!__builtin_constant_p(x)) {
/*
* The compiler needs a bit of a hint here to always do the
* right thing and not screw it up to different degrees
* depending on the gcc version.
*/
asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
- }
+ } else
+#endif
+ t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
+
x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */