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| author | David Brownell <dbrownell@users.sourceforge.net> | 2006-12-06 17:13:55 -0800 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2007-09-20 09:59:20 -0700 |
| commit | 1c22cc13256046162bb8e7b44763f6c39790af74 (patch) | |
| tree | fd6b2c1dde3c3054e752fcb72d253aec5953deab /include/asm-arm | |
| parent | 742c53e48e5f8e05ec9f0818281fada9c6061023 (diff) | |
| download | linux-1c22cc13256046162bb8e7b44763f6c39790af74.tar.gz linux-1c22cc13256046162bb8e7b44763f6c39790af74.tar.bz2 linux-1c22cc13256046162bb8e7b44763f6c39790af74.zip | |
ARM: OMAP: omap2/gpmc updates
GPMC updates:
- bugfixes: wrong/missing flags, omitted write, wrong test
- don't map memory segments starting at zero
- improve debug messaging
- export gpmc_get_fclk_perio]d() since it's needed to calc timings
- expect gpmc_cs_set_timings() caller to have initialized sync vs async
Note that this API is glitchy; likely the best fix would be to add
a member to "struct gpmc_timings" to hold GPMC_CONFIG1, since that
holds one key aspect of the GPMC timings (the gpmc_fclk divisor,
and sync vs. async == whether that divisor matters).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-omap/gpmc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h index 995cc83482eb..434672df702f 100644 --- a/include/asm-arm/arch-omap/gpmc.h +++ b/include/asm-arm/arch-omap/gpmc.h @@ -23,9 +23,10 @@ #define GPMC_CS_NAND_DATA 0x24 #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) -#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) +#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) +#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) |