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| author | Weili Qian <qianweili@huawei.com> | 2022-09-09 17:46:56 +0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2022-09-16 18:29:44 +0800 |
| commit | 129a9f340172b4f3857260a7a7bb9d7b3496ba50 (patch) | |
| tree | 2a43e8d964a32e93c3210dc1e4d53cdd2998b8c3 /include/linux/hisi_acc_qm.h | |
| parent | 82f00b24f532557fb0e15a6a2747859e4b70c4bd (diff) | |
| download | linux-129a9f340172b4f3857260a7a7bb9d7b3496ba50.tar.gz linux-129a9f340172b4f3857260a7a7bb9d7b3496ba50.tar.bz2 linux-129a9f340172b4f3857260a7a7bb9d7b3496ba50.zip | |
crypto: hisilicon/qm - get qp num and depth from hardware registers
Hardware V3 and later versions can obtain qp num and depth supported
by the hardware from registers. To be compatible with later hardware
versions, get qp num and depth from registers instead of fixed marcos.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/linux/hisi_acc_qm.h')
| -rw-r--r-- | include/linux/hisi_acc_qm.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/linux/hisi_acc_qm.h b/include/linux/hisi_acc_qm.h index 851c962ba473..371c0e7ffd27 100644 --- a/include/linux/hisi_acc_qm.h +++ b/include/linux/hisi_acc_qm.h @@ -109,7 +109,6 @@ QM_MAILBOX_TIMEOUT | QM_FLR_TIMEOUT) #define QM_BASE_CE QM_ECC_1BIT -#define QM_Q_DEPTH 1024 #define QM_MIN_QNUM 2 #define HISI_ACC_SGL_SGE_NR_MAX 255 #define QM_SHAPER_CFG 0x100164 @@ -310,6 +309,8 @@ struct hisi_qm { u32 max_qp_num; u32 vfs_num; u32 db_interval; + u16 eq_depth; + u16 aeq_depth; struct list_head list; struct hisi_qm_list *qm_list; @@ -375,6 +376,8 @@ struct hisi_qp_ops { struct hisi_qp { u32 qp_id; + u16 sq_depth; + u16 cq_depth; u8 alg_type; u8 req_type; |