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author | Yevgeny Petrilin <yevgenyp@mellanox.com> | 2016-06-23 17:02:37 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2016-06-27 04:10:40 -0400 |
commit | 1466cc5b23d18e7b6b8f1a45443d595393dbcae7 (patch) | |
tree | 2e59ace67ce4eb2d55cf9e38fd04f08525e39047 /include/linux/mlx5/device.h | |
parent | f1eecb7ea89ef3ee0b0aa6e818a82e91d5525c18 (diff) | |
download | linux-1466cc5b23d18e7b6b8f1a45443d595393dbcae7.tar.gz linux-1466cc5b23d18e7b6b8f1a45443d595393dbcae7.tar.bz2 linux-1466cc5b23d18e7b6b8f1a45443d595393dbcae7.zip |
net/mlx5: Rate limit tables support
Configuring and managing HW rate limit tables.
The HW holds a table of rate limits, each rate is
associated with an index in that table.
Later a Send Queue uses this index to set the rate limit.
Multiple Send Queues can have the same rate limit, which is
represented by a single entry in this table.
Even though a rate can be shared, each queue is being rate
limited independently of others.
The SW shadow of this table holds the rate itself,
the index in the HW table and the refcount (number of queues)
working with this rate.
The exported functions are mlx5_rl_add_rate and mlx5_rl_remove_rate.
Number of different rates and their values are derived
from HW capabilities.
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mlx5/device.h')
-rw-r--r-- | include/linux/mlx5/device.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h index 73a48479892d..e0a3ed758287 100644 --- a/include/linux/mlx5/device.h +++ b/include/linux/mlx5/device.h @@ -1330,6 +1330,7 @@ enum mlx5_cap_type { MLX5_CAP_ESWITCH, MLX5_CAP_RESERVED, MLX5_CAP_VECTOR_CALC, + MLX5_CAP_QOS, /* NUM OF CAP Types */ MLX5_CAP_NUM }; @@ -1414,6 +1415,9 @@ enum mlx5_cap_type { MLX5_GET(vector_calc_cap, \ mdev->hca_caps_cur[MLX5_CAP_VECTOR_CALC], cap) +#define MLX5_CAP_QOS(mdev, cap)\ + MLX5_GET(qos_cap, mdev->hca_caps_cur[MLX5_CAP_QOS], cap) + enum { MLX5_CMD_STAT_OK = 0x0, MLX5_CMD_STAT_INT_ERR = 0x1, |