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| author | Florian Fainelli <f.fainelli@gmail.com> | 2017-02-27 17:35:03 -0800 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2017-12-20 17:37:43 -0800 |
| commit | b4b32e321639859738e0226f42e05ed0f7e2fc64 (patch) | |
| tree | 75b5c3edd8d12e76c7422489aa3c988727b7982d /include/ras | |
| parent | 6451d644b8f3d7188778bac60e3543274b41ae30 (diff) | |
| download | linux-b4b32e321639859738e0226f42e05ed0f7e2fc64.tar.gz linux-b4b32e321639859738e0226f42e05ed0f7e2fc64.tar.bz2 linux-b4b32e321639859738e0226f42e05ed0f7e2fc64.zip | |
soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
In order to achieve expected MCP bus throughput on 3 particular chips:
7268, 7271 and 7278, do the appropriate programming of the MCP
interface: increase number of MCP write credits, turn on write-back
throttling when present.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'include/ras')
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