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author | Damien Le Moal <damien.lemoal@wdc.com> | 2021-02-10 14:02:14 +0900 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-02-22 17:51:04 -0800 |
commit | c6ca7616f7d5c2ce166280107ba74db1d528fcb7 (patch) | |
tree | 12e5c34d4433b636971078f7e2aff0338ee82bf1 /include/soc/canaan | |
parent | 4bb875632ad0e8b71fa0f0be292793c061a9f43c (diff) | |
download | linux-c6ca7616f7d5c2ce166280107ba74db1d528fcb7.tar.gz linux-c6ca7616f7d5c2ce166280107ba74db1d528fcb7.tar.bz2 linux-c6ca7616f7d5c2ce166280107ba74db1d528fcb7.zip |
clk: Add RISC-V Canaan Kendryte K210 clock driver
Add a clock provider driver for the Canaan Kendryte K210 RISC-V SoC.
This new driver with the compatible string "canaan,k210-clk" implements
support for the full clock structure of the K210 SoC. Since it is
required for the correct operation of the SoC, this driver is
selected by default for compilation when the SOC_CANAAN option is
selected.
With this change, the k210-sysctl driver is turned into a simple
platform driver which enables its power bus clock and triggers
populating its child nodes. The sysctl driver retains the SOC early
initialization code, but the implementation now relies on the new
function k210_clk_early_init() provided by the new clk-k210 driver.
The clock structure implemented and many of the coding ideas for the
driver come from the work by Sean Anderson on the K210 support for the
U-Boot project.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'include/soc/canaan')
-rw-r--r-- | include/soc/canaan/k210-sysctl.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/soc/canaan/k210-sysctl.h b/include/soc/canaan/k210-sysctl.h index 2e037db68f35..0c2b2c2dabca 100644 --- a/include/soc/canaan/k210-sysctl.h +++ b/include/soc/canaan/k210-sysctl.h @@ -38,4 +38,6 @@ #define K210_SYSCTL_DMA_SEL1 0x68 /* DMA handshake selector 1 */ #define K210_SYSCTL_POWER_SEL 0x6C /* IO Power Mode Select controller */ +void k210_clk_early_init(void __iomem *regs); + #endif |