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| author | Mikko Perttunen <mperttunen@nvidia.com> | 2018-02-20 13:58:06 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-03-08 14:20:58 +0100 |
| commit | 1abb081e41a718d73183b0e1b76bfff66e92f7e1 (patch) | |
| tree | 5d1e42f21241910c4a7af23a9b52ae763fd68aeb /include/soc/tegra | |
| parent | 7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff) | |
| download | linux-1abb081e41a718d73183b0e1b76bfff66e92f7e1.tar.gz linux-1abb081e41a718d73183b0e1b76bfff66e92f7e1.tar.bz2 linux-1abb081e41a718d73183b0e1b76bfff66e92f7e1.zip | |
firmware: tegra: Simplify channel management
The Tegra194 BPMP only implements 5 channels (4 to BPMP, 1 to CCPLEX),
and they are not placed contiguously in memory. The current channel
management in the BPMP driver does not support this.
Simplify and refactor the channel management such that only one atomic
transmit channel and one receive channel are supported, and channels
are not required to be placed contiguously in memory. The same
configuration also works on T186 so we end up with less code.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc/tegra')
| -rw-r--r-- | include/soc/tegra/bpmp.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/soc/tegra/bpmp.h b/include/soc/tegra/bpmp.h index aeae4466dd25..e69e4c4d80ae 100644 --- a/include/soc/tegra/bpmp.h +++ b/include/soc/tegra/bpmp.h @@ -75,8 +75,8 @@ struct tegra_bpmp { struct mbox_chan *channel; } mbox; - struct tegra_bpmp_channel *channels; - unsigned int num_channels; + spinlock_t atomic_tx_lock; + struct tegra_bpmp_channel *tx_channel, *rx_channel, *threaded_channels; struct { unsigned long *allocated; |