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author | Ofir Bitton <obitton@habana.ai> | 2023-01-22 14:06:15 +0200 |
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committer | Oded Gabbay <ogabbay@kernel.org> | 2023-03-15 13:29:12 +0200 |
commit | 7fc0d011c378c6b2abc65cb536e0df0ee055ed39 (patch) | |
tree | f1205c6dcbe8ac6c7744f1a400824ad44e055447 /include/uapi/drm | |
parent | 313e9f63b74419ca14c2c09f581a79c7037ee0e2 (diff) | |
download | linux-7fc0d011c378c6b2abc65cb536e0df0ee055ed39.tar.gz linux-7fc0d011c378c6b2abc65cb536e0df0ee055ed39.tar.bz2 linux-7fc0d011c378c6b2abc65cb536e0df0ee055ed39.zip |
accel/habanalabs: expose engine core int reg address
In order for engine cores to raise interrupts towards FW, They need
to know which register the event data should be written to.
Hence, we forward the relevant scratchpad register received during
dynamic regs handshake with FW.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
Diffstat (limited to 'include/uapi/drm')
-rw-r--r-- | include/uapi/drm/habanalabs_accel.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/uapi/drm/habanalabs_accel.h b/include/uapi/drm/habanalabs_accel.h index 3a62652a6452..c1fdbb85d1d5 100644 --- a/include/uapi/drm/habanalabs_accel.h +++ b/include/uapi/drm/habanalabs_accel.h @@ -885,6 +885,8 @@ enum hl_server_type { * application to use. Relevant for Gaudi2 and later. * @device_mem_alloc_default_page_size: default page size used in device memory allocation. * @revision_id: PCI revision ID of the ASIC. + * @engine_core_interrupt_reg_addr: interrupt register address for engine core to use + * in order to raise events toward FW. */ struct hl_info_hw_ip_info { __u64 sram_base_address; @@ -921,6 +923,9 @@ struct hl_info_hw_ip_info { __u8 reserved8; __u8 revision_id; __u8 pad[2]; + __u32 reserved9; + __u8 pad3[4]; + __u64 engine_core_interrupt_reg_addr; }; struct hl_info_dram_usage { |