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| author | Talat Batheesh <talatb@mellanox.com> | 2018-05-17 11:14:18 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leonro@mellanox.com> | 2018-06-21 20:52:04 +0300 |
| commit | 0af5107cd0640ee3424e337b492e4b11b450ce28 (patch) | |
| tree | 1199ce63860a728dd46ede4ee2a9e4e62dccce6d /include | |
| parent | 38b7ca927d6a12bf4466be22a90b7d998f5ae69a (diff) | |
| download | linux-0af5107cd0640ee3424e337b492e4b11b450ce28.tar.gz linux-0af5107cd0640ee3424e337b492e4b11b450ce28.tar.bz2 linux-0af5107cd0640ee3424e337b492e4b11b450ce28.zip | |
net/mlx5: Add RoCE RX ICRC encapsulated counter
Add capability bit in PCAM register and RoCE ICRC error counter
to PPCNT register.
Signed-off-by: Talat Batheesh <talatb@mellanox.com>
Reviewed-by: Mark Bloch <markb@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index f810772e80c0..deb3a459a22e 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1681,7 +1681,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { u8 rx_buffer_full_low[0x20]; - u8 reserved_at_1c0[0x600]; + u8 rx_icrc_encapsulated_high[0x20]; + + u8 rx_icrc_encapsulated_low[0x20]; + + u8 reserved_at_200[0x5c0]; }; struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits { @@ -8044,8 +8048,9 @@ struct mlx5_ifc_peir_reg_bits { }; struct mlx5_ifc_pcam_enhanced_features_bits { - u8 reserved_at_0[0x76]; - + u8 reserved_at_0[0x6d]; + u8 rx_icrc_encapsulated_counter[0x1]; + u8 reserved_at_6e[0x8]; u8 pfcc_mask[0x1]; u8 reserved_at_77[0x4]; u8 rx_buffer_fullness_counters[0x1]; |