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authorGeert Uytterhoeven <geert+renesas@glider.be>2016-09-29 13:06:15 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-03-30 13:25:43 +0200
commit89f1b1c614253d7ea57543f769d93fced99d4d05 (patch)
tree50846be8db002a74703ba48cb499a2956e99dd10 /include
parent48d0341e41870bcfc42206d38e00a6b1c2fea929 (diff)
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clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3 Hardware User's Manual rev. 0.53E. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/r8a7795-cpg-mssr.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r8a7795-cpg-mssr.h b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
index e864aae0a256..f047eaf261f3 100644
--- a/include/dt-bindings/clock/r8a7795-cpg-mssr.h
+++ b/include/dt-bindings/clock/r8a7795-cpg-mssr.h
@@ -60,4 +60,11 @@
#define R8A7795_CLK_R 45
#define R8A7795_CLK_OSC 46
+/* r8a7795 ES2.0 CPG Core Clocks */
+#define R8A7795_CLK_S0D2 47
+#define R8A7795_CLK_S0D3 48
+#define R8A7795_CLK_S0D6 49
+#define R8A7795_CLK_S0D8 50
+#define R8A7795_CLK_S0D12 51
+
#endif /* __DT_BINDINGS_CLOCK_R8A7795_CPG_MSSR_H__ */