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| author | Olof Johansson <olof@lixom.net> | 2015-04-03 13:57:26 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-04-03 13:57:26 -0700 |
| commit | f83255cca7ce437e9a071a6e177453371cec78b8 (patch) | |
| tree | 5686a30003e6957493b3d3285041bdf92c67bd07 /include | |
| parent | 50ae4bb946126d1ae52b83446eb125117af9dcd3 (diff) | |
| parent | ae4aee959f7959427e99edb3927c9512986cbdc5 (diff) | |
| download | linux-f83255cca7ce437e9a071a6e177453371cec78b8.tar.gz linux-f83255cca7ce437e9a071a6e177453371cec78b8.tar.bz2 linux-f83255cca7ce437e9a071a6e177453371cec78b8.zip | |
Merge tag 'imx-soc-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: soc changes for 4.1" from Shawn Guo:
The i.MX SoC changes for 4.1:
- An error handling improvement on imx-weim bus driver
- A number of imx6q clock tree update around MIPI support
- Add support for i.MX6 GPU/VPU power domain
- Enable SMP_ON_UP build for Vybrid
- Let MXC_DEBUG_BOARD depend on 3-stack (3DS) boards
* tag 'imx-soc-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: depend MXC debug board on 3DS machines
ARM: imx6: gpc: Add PU power domain for GPU/VPU
Documentation: Add device tree bindings for Freescale i.MX GPC
bus: imx-weim: improve error handling upon child probe-failure
ARM: imx6q: clk: Add support for mipi_ipg clock as a shared clock gate
ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate
ARM: imx6q: clk: Change hsi_tx clock to be a shared clock gate
ARM: imx6q: clk: Change hdmi_isfr clock's parent to be video_27m clock
ARM: imx6q: clk: Add the video_27m clock
ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition
ARM: vf610: use SMP_ON_UP for Vybrid SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx6qdl-clock.h | 5 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index b690cdba163b..8780868458a0 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -248,6 +248,9 @@ #define IMX6QDL_PLL6_BYPASS 235 #define IMX6QDL_PLL7_BYPASS 236 #define IMX6QDL_CLK_GPT_3M 237 -#define IMX6QDL_CLK_END 238 +#define IMX6QDL_CLK_VIDEO_27M 238 +#define IMX6QDL_CLK_MIPI_CORE_CFG 239 +#define IMX6QDL_CLK_MIPI_IPG 240 +#define IMX6QDL_CLK_END 241 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index c877cad61a13..d16f4c82c568 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -207,6 +207,7 @@ #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6) #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI0 (0x2 << 6) #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI1 (0x3 << 6) +#define IMX6Q_GPR3_MIPI_MUX_CTL_SHIFT 4 #define IMX6Q_GPR3_MIPI_MUX_CTL_MASK (0x3 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI0 (0x0 << 4) #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) |