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author | Russell Currey <ruscur@russell.cc> | 2016-09-14 16:37:17 +1000 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-09-21 14:04:13 +1000 |
commit | b79331a5eb9f96e4dfd216974581168ec4c8a4d4 (patch) | |
tree | b31542d6a1edbea965d7566bd6d0d8a10e18055c /net/ipv6/xfrm6_mode_tunnel.c | |
parent | ed7d9a1d7da6fe7b1c7477dc70e95051583fd60c (diff) | |
download | linux-b79331a5eb9f96e4dfd216974581168ec4c8a4d4.tar.gz linux-b79331a5eb9f96e4dfd216974581168ec4c8a4d4.tar.bz2 linux-b79331a5eb9f96e4dfd216974581168ec4c8a4d4.zip |
powerpc/powernv/pci: Fix m64 checks for SR-IOV and window alignment
Commit 5958d19a143e checks for prefetchable m64 BARs by comparing the
addresses instead of using resource flags. This broke SR-IOV as the m64
check in pnv_pci_ioda_fixup_iov_resources() fails.
The condition in pnv_pci_window_alignment() also changed to checking
only IORESOURCE_MEM_64 instead of both IORESOURCE_MEM_64 and
IORESOURCE_PREFETCH.
Revert these cases to the previous behaviour, adding a new helper function
to do so. This is named pnv_pci_is_m64_flags() to make it clear this
function is only looking at resource flags and should not be relied on for
non-SRIOV resources.
Fixes: 5958d19a143e ("Fix incorrect PE reservation attempt on some 64-bit BARs")
Reported-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Russell Currey <ruscur@russell.cc>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'net/ipv6/xfrm6_mode_tunnel.c')
0 files changed, 0 insertions, 0 deletions