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authorShengjiu Wang <shengjiu.wang@nxp.com>2022-06-28 16:39:49 +0800
committerMark Brown <broonie@kernel.org>2022-06-29 11:58:45 +0100
commit3b13b1437dcce4469db575c60d1da4fa9ff80694 (patch)
tree3ae78377749fbd1d27d61168be2360b48ae275bb /sound/soc/fsl/fsl_micfil.h
parentd29e0a6e3631724c0b36786c6d9616b6e4ebeaa4 (diff)
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ASoC: fsl_micfil: change micfil default settings
Previous default settings resulted in loose dynamic range and low sound level. New default configuration changes: - outgain = 2 - quality mode = VLOW0 - dc remover = bypass Signed-off-by: Irina Patru <ioana-irina.patru@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1656405589-29850-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/fsl_micfil.h')
-rw-r--r--sound/soc/fsl/fsl_micfil.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_micfil.h b/sound/soc/fsl/fsl_micfil.h
index 053caba3caf3..d60285dd07bc 100644
--- a/sound/soc/fsl/fsl_micfil.h
+++ b/sound/soc/fsl/fsl_micfil.h
@@ -73,6 +73,15 @@
#define MICFIL_FIFO_STAT_FIFOX_OVER(ch) BIT(ch)
#define MICFIL_FIFO_STAT_FIFOX_UNDER(ch) BIT((ch) + 8)
+/* MICFIL DC Remover Control Register -- REG_MICFIL_DC_CTRL */
+#define MICFIL_DC_CTRL_CONFIG GENMASK(15, 0)
+#define MICFIL_DC_CHX_SHIFT(ch) ((ch) << 1)
+#define MICFIL_DC_CHX(ch) GENMASK((((ch) << 1) + 1), ((ch) << 1))
+#define MICFIL_DC_CUTOFF_21HZ 0
+#define MICFIL_DC_CUTOFF_83HZ 1
+#define MICFIL_DC_CUTOFF_152Hz 2
+#define MICFIL_DC_BYPASS 3
+
/* MICFIL HWVAD0 Control 1 Register -- REG_MICFIL_VAD0_CTRL1*/
#define MICFIL_VAD0_CTRL1_CHSEL GENMASK(26, 24)
#define MICFIL_VAD0_CTRL1_CICOSR GENMASK(19, 16)