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author | Markos Chandras <markos.chandras@imgtec.com> | 2014-11-26 10:10:18 +0000 |
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committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 15:37:32 +0000 |
commit | c8a34581ec09a5ee11dd833d6c5cf41fdbef706f (patch) | |
tree | ae78d1cc82562dfa92bcad4bcc7848343af21dc7 /sound/soc/rockchip | |
parent | 319824eabc3f1c1aab67f408d66f384fbb996ee2 (diff) | |
download | linux-c8a34581ec09a5ee11dd833d6c5cf41fdbef706f.tar.gz linux-c8a34581ec09a5ee11dd833d6c5cf41fdbef706f.tar.bz2 linux-c8a34581ec09a5ee11dd833d6c5cf41fdbef706f.zip |
MIPS: Emulate the BC1{EQ,NE}Z FPU instructions
MIPS R6 introduced the following two branch instructions for COP1:
BC1EQZ: Branch if Cop1 (FPR) Register Bit 0 is Equal to Zero
BC1NEZ: Branch if Cop1 (FPR) Register Bit 0 is Not Equal to Zero
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'sound/soc/rockchip')
0 files changed, 0 insertions, 0 deletions