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author | V Sujith Kumar Reddy <vsujithk@codeaurora.org> | 2020-10-19 14:36:03 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2020-10-29 12:24:14 +0000 |
commit | 6ec6c3693a389841d8ca952072aea8020da54ef4 (patch) | |
tree | cc728d97007141ec15c647bcc12e6b77c58afde7 /sound/soc | |
parent | cf9d21984da2c8e852320d12c03ddb7d11760a32 (diff) | |
download | linux-6ec6c3693a389841d8ca952072aea8020da54ef4.tar.gz linux-6ec6c3693a389841d8ca952072aea8020da54ef4.tar.bz2 linux-6ec6c3693a389841d8ca952072aea8020da54ef4.zip |
ASoC: qcom: lpass-cpu: Fix clock disable failure
Disable MI2S bit clock from PAUSE/STOP/SUSPEND usecase instead of
shutdown time. Acheive this by invoking clk_disable API from
cpu daiops trigger instead of cpu daiops shutdown.
Change non-atomic API "clk_prepare_enable" to atomic API
"clk_enable" in trigger, as trigger is being called from atomic context.
Fixes: 7e6799d8f87d ("ASoC: qcom: lpass-cpu: Enable MI2S BCLK and LRCLK together")
Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1603098363-9251-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/qcom/lpass-cpu.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index ba2aca301a9b..9d17c87445a9 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c @@ -80,6 +80,12 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream, dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); return ret; } + ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); + if (ret) { + dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); + clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); + return ret; + } return 0; } @@ -88,9 +94,8 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream, { struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); - clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); - clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); + clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); } static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, @@ -303,10 +308,10 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); - ret = clk_prepare_enable(drvdata->mi2s_bit_clk[id]); + ret = clk_enable(drvdata->mi2s_bit_clk[id]); if (ret) { dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); - clk_disable_unprepare(drvdata->mi2s_osr_clk[id]); + clk_disable(drvdata->mi2s_osr_clk[id]); return ret; } @@ -324,6 +329,7 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, if (ret) dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); + clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); break; } |