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author | Leo Yan <leo.yan@linux.dev> | 2024-02-14 19:39:46 +0800 |
---|---|---|
committer | Namhyung Kim <namhyung@kernel.org> | 2024-02-15 13:48:36 -0800 |
commit | 9a4e47ef98a3041f6d2869ba2cd3401701776275 (patch) | |
tree | ba9828d2b59e99812b404ac0032d40f14ecef01c /tools/perf/arch/riscv | |
parent | ec87c99de48933e8b9b530b08e51832b400256bd (diff) | |
download | linux-9a4e47ef98a3041f6d2869ba2cd3401701776275.tar.gz linux-9a4e47ef98a3041f6d2869ba2cd3401701776275.tar.bz2 linux-9a4e47ef98a3041f6d2869ba2cd3401701776275.zip |
perf parse-regs: Introduce a weak function arch__sample_reg_masks()
Every architecture can provide a register list for sampling. If an
architecture doesn't support register sampling, it won't define the data
structure 'sample_reg_masks'. Consequently, any code using this
structure must be protected by the macro 'HAVE_PERF_REGS_SUPPORT'.
This patch defines a weak function, arch__sample_reg_masks(), which will
be replaced by an architecture-defined function for returning the
architecture's register list. With this refactoring, the function always
exists, the condition checking for 'HAVE_PERF_REGS_SUPPORT' is not
needed anymore, so remove it.
Signed-off-by: Leo Yan <leo.yan@linux.dev>
Reviewed-by: Ian Rogers <irogers@google.com>
Cc: James Clark <james.clark@arm.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Guo Ren <guoren@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Ming Wang <wangming01@loongson.cn>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: linux-csky@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240214113947.240957-4-leo.yan@linux.dev
Diffstat (limited to 'tools/perf/arch/riscv')
-rw-r--r-- | tools/perf/arch/riscv/util/perf_regs.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/tools/perf/arch/riscv/util/perf_regs.c b/tools/perf/arch/riscv/util/perf_regs.c index c0877c264d49..6b1665f41180 100644 --- a/tools/perf/arch/riscv/util/perf_regs.c +++ b/tools/perf/arch/riscv/util/perf_regs.c @@ -2,7 +2,7 @@ #include "perf_regs.h" #include "../../util/perf_regs.h" -const struct sample_reg sample_reg_masks[] = { +static const struct sample_reg sample_reg_masks[] = { SMPL_REG_END }; @@ -15,3 +15,8 @@ uint64_t arch__user_reg_mask(void) { return PERF_REGS_MASK; } + +const struct sample_reg *arch__sample_reg_masks(void) +{ + return sample_reg_masks; +} |