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-rw-r--r--drivers/pci/pcie/Kconfig2
-rw-r--r--drivers/pci/pcie/pcie-dpc.c4
-rw-r--r--drivers/pci/pcie/portdrv_core.c4
3 files changed, 7 insertions, 3 deletions
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index ac53edbc9613..d658dfa53b87 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -92,7 +92,7 @@ config PCIE_PME
config PCIE_DPC
bool "PCIe Downstream Port Containment support"
- depends on PCIEPORTBUS
+ depends on PCIEPORTBUS && PCIEAER
default n
help
This enables PCI Express Downstream Port Containment (DPC)
diff --git a/drivers/pci/pcie/pcie-dpc.c b/drivers/pci/pcie/pcie-dpc.c
index f7cf5ae7dec2..d1fbd83cd240 100644
--- a/drivers/pci/pcie/pcie-dpc.c
+++ b/drivers/pci/pcie/pcie-dpc.c
@@ -15,6 +15,7 @@
#include <linux/pci.h>
#include <linux/pcieport_if.h>
#include "../pci.h"
+#include "aer/aerdrv.h"
struct rp_pio_header_log_regs {
u32 dw0;
@@ -309,6 +310,9 @@ static int dpc_probe(struct pcie_device *dev)
int status;
u16 ctl, cap;
+ if (pcie_aer_get_firmware_first(pdev))
+ return -ENOTSUPP;
+
dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL);
if (!dpc)
return -ENOMEM;
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index a59210350c44..ef3bad4ad010 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -216,9 +216,9 @@ static int get_port_device_capability(struct pci_dev *dev)
return 0;
cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
- | PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC;
+ | PCIE_PORT_SERVICE_VC;
if (pci_aer_available())
- cap_mask |= PCIE_PORT_SERVICE_AER;
+ cap_mask |= PCIE_PORT_SERVICE_AER | PCIE_PORT_SERVICE_DPC;
if (pcie_ports_auto)
pcie_port_platform_notify(dev, &cap_mask);