diff options
Diffstat (limited to 'arch/mips/ath79')
| -rw-r--r-- | arch/mips/ath79/clock.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c index c234818b30e1..699f00f096cb 100644 --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c @@ -42,6 +42,7 @@ static const char * const clk_names[ATH79_CLK_END] = { [ATH79_CLK_DDR] = "ddr", [ATH79_CLK_AHB] = "ahb", [ATH79_CLK_REF] = "ref", + [ATH79_CLK_MDIO] = "mdio", }; static const char * __init ath79_clk_name(int type) @@ -342,6 +343,10 @@ static void __init ar934x_clocks_init(void __iomem *pll_base) ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + clk_ctrl = __raw_readl(pll_base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); + if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) + ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); + iounmap(dpll_base); } @@ -698,6 +703,9 @@ static void __init ath79_clocks_init_dt(struct device_node *np) else if (of_device_is_compatible(np, "qca,qca9560-pll")) qca956x_clocks_init(pll_base); + if (!clks[ATH79_CLK_MDIO]) + clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; + if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { pr_err("%pOF: could not register clk provider\n", np); goto err_iounmap; |