diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_de.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_de.h | 39 |
1 files changed, 37 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 9c104f65e4c8..3dbd76fdabd6 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -16,6 +16,12 @@ intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) return intel_uncore_read(&i915->uncore, reg); } +static inline u8 +intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) +{ + return intel_uncore_read8(&i915->uncore, reg); +} + static inline void intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) { @@ -28,10 +34,10 @@ intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) intel_uncore_write(&i915->uncore, reg, val); } -static inline void +static inline u32 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) { - intel_uncore_rmw(&i915->uncore, reg, clear, set); + return intel_uncore_rmw(&i915->uncore, reg, clear, set); } static inline int @@ -42,6 +48,23 @@ intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg, } static inline int +intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg, + u32 mask, u32 value, unsigned int timeout) +{ + return intel_wait_for_register_fw(&i915->uncore, reg, mask, value, timeout); +} + +static inline int +__intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg, + u32 mask, u32 value, + unsigned int fast_timeout_us, + unsigned int slow_timeout_ms, u32 *out_value) +{ + return __intel_wait_for_register(&i915->uncore, reg, mask, value, + fast_timeout_us, slow_timeout_ms, out_value); +} + +static inline int intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg, u32 mask, unsigned int timeout) { @@ -81,4 +104,16 @@ intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val) intel_uncore_write_fw(&i915->uncore, reg, val); } +static inline u32 +intel_de_read_notrace(struct drm_i915_private *i915, i915_reg_t reg) +{ + return intel_uncore_read_notrace(&i915->uncore, reg); +} + +static inline void +intel_de_write_notrace(struct drm_i915_private *i915, i915_reg_t reg, u32 val) +{ + intel_uncore_write_notrace(&i915->uncore, reg, val); +} + #endif /* __INTEL_DE_H__ */ |