diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_fbc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_fbc.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index b5ee5ea0d010..5e69d3c11d21 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -323,10 +323,8 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc) enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane; struct drm_i915_private *dev_priv = fbc->i915; - spin_lock_irq(&dev_priv->uncore.lock); intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane), intel_de_read_fw(dev_priv, DSPADDR(i9xx_plane))); - spin_unlock_irq(&dev_priv->uncore.lock); } static void i8xx_fbc_program_cfb(struct intel_fbc *fbc) @@ -359,10 +357,8 @@ static void i965_fbc_nuke(struct intel_fbc *fbc) enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane; struct drm_i915_private *dev_priv = fbc->i915; - spin_lock_irq(&dev_priv->uncore.lock); intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane), intel_de_read_fw(dev_priv, DSPSURF(i9xx_plane))); - spin_unlock_irq(&dev_priv->uncore.lock); } static const struct intel_fbc_funcs i965_fbc_funcs = { @@ -815,7 +811,7 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc) static void intel_fbc_program_workarounds(struct intel_fbc *fbc) { - /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp */ + /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp,mtl */ if (DISPLAY_VER(fbc->i915) >= 11 && !IS_DG2(fbc->i915)) intel_de_rmw(fbc->i915, ILK_DPFC_CHICKEN(fbc->id), 0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION); @@ -1095,7 +1091,9 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, } /* Wa_14016291713 */ - if (IS_DISPLAY_VER(i915, 12, 13) && crtc_state->has_psr) { + if ((IS_DISPLAY_VER(i915, 12, 13) || + IS_MTL_DISPLAY_STEP(i915, STEP_A0, STEP_C0)) && + crtc_state->has_psr) { plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)"; return 0; } |