diff options
Diffstat (limited to 'drivers/thermal')
20 files changed, 403 insertions, 166 deletions
diff --git a/drivers/thermal/broadcom/brcmstb_thermal.c b/drivers/thermal/broadcom/brcmstb_thermal.c index 270982740fde..f46f2ddc174e 100644 --- a/drivers/thermal/broadcom/brcmstb_thermal.c +++ b/drivers/thermal/broadcom/brcmstb_thermal.c @@ -286,14 +286,20 @@ static int brcmstb_set_trips(struct thermal_zone_device *tz, int low, int high) return 0; } -static const struct thermal_zone_device_ops brcmstb_16nm_of_ops = { +static const struct thermal_zone_device_ops brcmstb_of_ops = { .get_temp = brcmstb_get_temp, }; +static const struct brcmstb_thermal_params brcmstb_8nm_params = { + .offset = 418670, + .mult = 509, + .of_ops = &brcmstb_of_ops, +}; + static const struct brcmstb_thermal_params brcmstb_16nm_params = { .offset = 457829, .mult = 557, - .of_ops = &brcmstb_16nm_of_ops, + .of_ops = &brcmstb_of_ops, }; static const struct thermal_zone_device_ops brcmstb_28nm_of_ops = { @@ -308,6 +314,7 @@ static const struct brcmstb_thermal_params brcmstb_28nm_params = { }; static const struct of_device_id brcmstb_thermal_id_table[] = { + { .compatible = "brcm,avs-tmon-bcm74110", .data = &brcmstb_8nm_params }, { .compatible = "brcm,avs-tmon-bcm7216", .data = &brcmstb_16nm_params }, { .compatible = "brcm,avs-tmon", .data = &brcmstb_28nm_params }, {}, diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c index 7e918bd3f100..4307161533a7 100644 --- a/drivers/thermal/hisi_thermal.c +++ b/drivers/thermal/hisi_thermal.c @@ -412,8 +412,8 @@ static int hi3660_thermal_probe(struct hisi_thermal_data *data) data->nr_sensors = 1; - data->sensor = devm_kzalloc(dev, sizeof(*data->sensor) * - data->nr_sensors, GFP_KERNEL); + data->sensor = devm_kcalloc(dev, data->nr_sensors, + sizeof(*data->sensor), GFP_KERNEL); if (!data->sensor) return -ENOMEM; diff --git a/drivers/thermal/intel/int340x_thermal/int3402_thermal.c b/drivers/thermal/intel/int340x_thermal/int3402_thermal.c index 543b03960e99..57b90005888a 100644 --- a/drivers/thermal/intel/int340x_thermal/int3402_thermal.c +++ b/drivers/thermal/intel/int340x_thermal/int3402_thermal.c @@ -45,6 +45,9 @@ static int int3402_thermal_probe(struct platform_device *pdev) struct int3402_thermal_data *d; int ret; + if (!adev) + return -ENODEV; + if (!acpi_has_method(adev->handle, "_TMP")) return -ENODEV; diff --git a/drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c b/drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c index 8dca6a6aceca..3d9efe69d562 100644 --- a/drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c +++ b/drivers/thermal/intel/int340x_thermal/int340x_thermal_zone.c @@ -133,8 +133,8 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev, if (ACPI_SUCCESS(status)) int34x_zone->aux_trip_nr = trip_cnt; - zone_trips = kzalloc(sizeof(*zone_trips) * (trip_cnt + INT340X_THERMAL_MAX_TRIP_COUNT), - GFP_KERNEL); + zone_trips = kcalloc(trip_cnt + INT340X_THERMAL_MAX_TRIP_COUNT, + sizeof(*zone_trips), GFP_KERNEL); if (!zone_trips) { ret = -ENOMEM; goto err_trips_alloc; @@ -143,7 +143,7 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev, for (i = 0; i < trip_cnt; i++) { zone_trips[i].type = THERMAL_TRIP_PASSIVE; zone_trips[i].temperature = THERMAL_TEMP_INVALID; - zone_trips[i].flags |= THERMAL_TRIP_FLAG_RW_TEMP; + zone_trips[i].flags = THERMAL_TRIP_FLAG_RW_TEMP; zone_trips[i].priv = THERMAL_INT_TO_TRIP_PRIV(i); } diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c index a55aaa8cef42..2097aae39946 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c @@ -485,7 +485,7 @@ static const struct pci_device_id proc_thermal_pci_ids[] = { { PCI_DEVICE_DATA(INTEL, ADL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_WT_REQ) }, { PCI_DEVICE_DATA(INTEL, LNLM_THERMAL, PROC_THERMAL_FEATURE_MSI_SUPPORT | - PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_DLVR | + PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_WT_HINT | PROC_THERMAL_FEATURE_POWER_FLOOR) }, { PCI_DEVICE_DATA(INTEL, MTLP_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_DLVR | @@ -495,8 +495,9 @@ static const struct pci_device_id proc_thermal_pci_ids[] = { { PCI_DEVICE_DATA(INTEL, RPL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_WT_REQ) }, { PCI_DEVICE_DATA(INTEL, PTL_THERMAL, PROC_THERMAL_FEATURE_RAPL | - PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_MSI_SUPPORT | - PROC_THERMAL_FEATURE_WT_HINT | PROC_THERMAL_FEATURE_POWER_FLOOR) }, + PROC_THERMAL_FEATURE_DLVR | PROC_THERMAL_FEATURE_DVFS | + PROC_THERMAL_FEATURE_MSI_SUPPORT | PROC_THERMAL_FEATURE_WT_HINT | + PROC_THERMAL_FEATURE_POWER_FLOOR) }, { }, }; diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c index dad63f2d5f90..3a028b78d9af 100644 --- a/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c +++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c @@ -166,15 +166,18 @@ static const struct mmio_reg adl_dvfs_mmio_regs[] = { { 0, 0x5A40, 1, 0x1, 0}, /* rfi_disable */ }; +static const struct mapping_table *dlvr_mapping; +static const struct mmio_reg *dlvr_mmio_regs_table; + #define RFIM_SHOW(suffix, table)\ static ssize_t suffix##_show(struct device *dev,\ struct device_attribute *attr,\ char *buf)\ {\ - const struct mapping_table *mapping = NULL;\ + const struct mmio_reg *mmio_regs = dlvr_mmio_regs_table;\ + const struct mapping_table *mapping = dlvr_mapping;\ struct proc_thermal_device *proc_priv;\ struct pci_dev *pdev = to_pci_dev(dev);\ - const struct mmio_reg *mmio_regs;\ const char **match_strs;\ int ret, err;\ u32 reg_val;\ @@ -186,12 +189,6 @@ static ssize_t suffix##_show(struct device *dev,\ mmio_regs = adl_dvfs_mmio_regs;\ } else if (table == 2) { \ match_strs = (const char **)dlvr_strings;\ - if (pdev->device == PCI_DEVICE_ID_INTEL_LNLM_THERMAL) {\ - mmio_regs = lnl_dlvr_mmio_regs;\ - mapping = lnl_dlvr_mapping;\ - } else {\ - mmio_regs = dlvr_mmio_regs;\ - } \ } else {\ match_strs = (const char **)fivr_strings;\ mmio_regs = tgl_fivr_mmio_regs;\ @@ -214,12 +211,12 @@ static ssize_t suffix##_store(struct device *dev,\ struct device_attribute *attr,\ const char *buf, size_t count)\ {\ - const struct mapping_table *mapping = NULL;\ + const struct mmio_reg *mmio_regs = dlvr_mmio_regs_table;\ + const struct mapping_table *mapping = dlvr_mapping;\ struct proc_thermal_device *proc_priv;\ struct pci_dev *pdev = to_pci_dev(dev);\ unsigned int input;\ const char **match_strs;\ - const struct mmio_reg *mmio_regs;\ int ret, err;\ u32 reg_val;\ u32 mask;\ @@ -230,12 +227,6 @@ static ssize_t suffix##_store(struct device *dev,\ mmio_regs = adl_dvfs_mmio_regs;\ } else if (table == 2) { \ match_strs = (const char **)dlvr_strings;\ - if (pdev->device == PCI_DEVICE_ID_INTEL_LNLM_THERMAL) {\ - mmio_regs = lnl_dlvr_mmio_regs;\ - mapping = lnl_dlvr_mapping;\ - } else {\ - mmio_regs = dlvr_mmio_regs;\ - } \ } else {\ match_strs = (const char **)fivr_strings;\ mmio_regs = tgl_fivr_mmio_regs;\ @@ -448,6 +439,16 @@ int proc_thermal_rfim_add(struct pci_dev *pdev, struct proc_thermal_device *proc } if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_DLVR) { + switch (pdev->device) { + case PCI_DEVICE_ID_INTEL_LNLM_THERMAL: + case PCI_DEVICE_ID_INTEL_PTL_THERMAL: + dlvr_mmio_regs_table = lnl_dlvr_mmio_regs; + dlvr_mapping = lnl_dlvr_mapping; + break; + default: + dlvr_mmio_regs_table = dlvr_mmio_regs; + break; + } ret = sysfs_create_group(&pdev->dev.kobj, &dlvr_attribute_group); if (ret) return ret; diff --git a/drivers/thermal/intel/intel_tcc.c b/drivers/thermal/intel/intel_tcc.c index 817421508d5c..b2a615aea7c1 100644 --- a/drivers/thermal/intel/intel_tcc.c +++ b/drivers/thermal/intel/intel_tcc.c @@ -106,7 +106,7 @@ static const struct x86_cpu_id intel_tcc_cpu_ids[] __initconst = { X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &temp_broadwell), X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &temp_broadwell), X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &temp_broadwell), - X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &temp_broadwell), + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID2, &temp_broadwell), X86_MATCH_VFM(INTEL_ATOM_AIRMONT_NP, &temp_broadwell), X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &temp_goldmont), X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &temp_goldmont), diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index 70de6dbf99c5..a36289e61315 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -460,13 +460,13 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) goto err_alloc; } - ref_table = kzalloc(sizeof(*ref_table) * TABLE_SIZE, GFP_KERNEL); + ref_table = kcalloc(TABLE_SIZE, sizeof(*ref_table), GFP_KERNEL); if (!ref_table) { ret = -ENOMEM; goto err_alloc; } - derived_table = devm_kzalloc(bgp->dev, sizeof(*derived_table) * TABLE_SIZE, + derived_table = devm_kcalloc(bgp->dev, TABLE_SIZE, sizeof(*derived_table), GFP_KERNEL); if (!derived_table) { ret = -ENOMEM; diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 07f7f3b7a2fb..088481d91e6e 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -65,12 +65,15 @@ #define LVTS_HW_FILTER 0x0 #define LVTS_TSSEL_CONF 0x13121110 #define LVTS_CALSCALE_CONF 0x300 -#define LVTS_MONINT_CONF 0x8300318C -#define LVTS_MONINT_OFFSET_SENSOR0 0xC -#define LVTS_MONINT_OFFSET_SENSOR1 0x180 -#define LVTS_MONINT_OFFSET_SENSOR2 0x3000 -#define LVTS_MONINT_OFFSET_SENSOR3 0x3000000 +#define LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR0 BIT(3) +#define LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR1 BIT(8) +#define LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR2 BIT(13) +#define LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR3 BIT(25) +#define LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR0 BIT(2) +#define LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR1 BIT(7) +#define LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR2 BIT(12) +#define LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR3 BIT(24) #define LVTS_INT_SENSOR0 0x0009001F #define LVTS_INT_SENSOR1 0x001203E0 @@ -91,8 +94,6 @@ #define LVTS_MSR_READ_TIMEOUT_US 400 #define LVTS_MSR_READ_WAIT_US (LVTS_MSR_READ_TIMEOUT_US / 2) -#define LVTS_HW_TSHUT_TEMP 105000 - #define LVTS_MINIMUM_THRESHOLD 20000 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT; @@ -145,7 +146,6 @@ struct lvts_ctrl { struct lvts_sensor sensors[LVTS_SENSOR_MAX]; const struct lvts_data *lvts_data; u32 calibration[LVTS_SENSOR_MAX]; - u32 hw_tshut_raw_temp; u8 valid_sensor_mask; int mode; void __iomem *base; @@ -329,23 +329,41 @@ static int lvts_get_temp(struct thermal_zone_device *tz, int *temp) static void lvts_update_irq_mask(struct lvts_ctrl *lvts_ctrl) { - static const u32 masks[] = { - LVTS_MONINT_OFFSET_SENSOR0, - LVTS_MONINT_OFFSET_SENSOR1, - LVTS_MONINT_OFFSET_SENSOR2, - LVTS_MONINT_OFFSET_SENSOR3, + static const u32 high_offset_inten_masks[] = { + LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR0, + LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR1, + LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR2, + LVTS_MONINT_OFFSET_HIGH_INTEN_SENSOR3, + }; + static const u32 low_offset_inten_masks[] = { + LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR0, + LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR1, + LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR2, + LVTS_MONINT_OFFSET_LOW_INTEN_SENSOR3, }; u32 value = 0; int i; value = readl(LVTS_MONINT(lvts_ctrl->base)); - for (i = 0; i < ARRAY_SIZE(masks); i++) { + lvts_for_each_valid_sensor(i, lvts_ctrl) { if (lvts_ctrl->sensors[i].high_thresh == lvts_ctrl->high_thresh - && lvts_ctrl->sensors[i].low_thresh == lvts_ctrl->low_thresh) - value |= masks[i]; - else - value &= ~masks[i]; + && lvts_ctrl->sensors[i].low_thresh == lvts_ctrl->low_thresh) { + /* + * The minimum threshold needs to be configured in the + * OFFSETL register to get working interrupts, but we + * don't actually want to generate interrupts when + * crossing it. + */ + if (lvts_ctrl->low_thresh == -INT_MAX) { + value &= ~low_offset_inten_masks[i]; + value |= high_offset_inten_masks[i]; + } else { + value |= low_offset_inten_masks[i] | high_offset_inten_masks[i]; + } + } else { + value &= ~(low_offset_inten_masks[i] | high_offset_inten_masks[i]); + } } writel(value, LVTS_MONINT(lvts_ctrl->base)); @@ -837,14 +855,6 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, */ lvts_ctrl[i].mode = lvts_data->lvts_ctrl[i].mode; - /* - * The temperature to raw temperature must be done - * after initializing the calibration. - */ - lvts_ctrl[i].hw_tshut_raw_temp = - lvts_temp_to_raw(LVTS_HW_TSHUT_TEMP, - lvts_data->temp_factor); - lvts_ctrl[i].low_thresh = INT_MIN; lvts_ctrl[i].high_thresh = INT_MIN; } @@ -860,6 +870,32 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td, return 0; } +static void lvts_ctrl_monitor_enable(struct device *dev, struct lvts_ctrl *lvts_ctrl, bool enable) +{ + /* + * Bitmaps to enable each sensor on filtered mode in the MONCTL0 + * register. + */ + static const u8 sensor_filt_bitmap[] = { BIT(0), BIT(1), BIT(2), BIT(3) }; + u32 sensor_map = 0; + int i; + + if (lvts_ctrl->mode != LVTS_MSR_FILTERED_MODE) + return; + + if (enable) { + lvts_for_each_valid_sensor(i, lvts_ctrl) + sensor_map |= sensor_filt_bitmap[i]; + } + + /* + * Bits: + * 9: Single point access flow + * 0-3: Enable sensing point 0-3 + */ + writel(sensor_map | BIT(9), LVTS_MONCTL0(lvts_ctrl->base)); +} + /* * At this point the configuration register is the only place in the * driver where we write multiple values. Per hardware constraint, @@ -893,7 +929,6 @@ static int lvts_irq_init(struct lvts_ctrl *lvts_ctrl) * 10 : Selected sensor with bits 19-18 * 11 : Reserved */ - writel(BIT(16), LVTS_PROTCTL(lvts_ctrl->base)); /* * LVTS_PROTTA : Stage 1 temperature threshold @@ -906,8 +941,8 @@ static int lvts_irq_init(struct lvts_ctrl *lvts_ctrl) * * writel(0x0, LVTS_PROTTA(lvts_ctrl->base)); * writel(0x0, LVTS_PROTTB(lvts_ctrl->base)); + * writel(0x0, LVTS_PROTTC(lvts_ctrl->base)); */ - writel(lvts_ctrl->hw_tshut_raw_temp, LVTS_PROTTC(lvts_ctrl->base)); /* * LVTS_MONINT : Interrupt configuration register @@ -915,7 +950,7 @@ static int lvts_irq_init(struct lvts_ctrl *lvts_ctrl) * The LVTS_MONINT register layout is the same as the LVTS_MONINTSTS * register, except we set the bits to enable the interrupt. */ - writel(LVTS_MONINT_CONF, LVTS_MONINT(lvts_ctrl->base)); + writel(0, LVTS_MONINT(lvts_ctrl->base)); return 0; } @@ -1381,8 +1416,11 @@ static int lvts_suspend(struct device *dev) lvts_td = dev_get_drvdata(dev); - for (i = 0; i < lvts_td->num_lvts_ctrl; i++) + for (i = 0; i < lvts_td->num_lvts_ctrl; i++) { + lvts_ctrl_monitor_enable(dev, &lvts_td->lvts_ctrl[i], false); + usleep_range(100, 200); lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], false); + } clk_disable_unprepare(lvts_td->clk); @@ -1400,8 +1438,11 @@ static int lvts_resume(struct device *dev) if (ret) return ret; - for (i = 0; i < lvts_td->num_lvts_ctrl; i++) + for (i = 0; i < lvts_td->num_lvts_ctrl; i++) { lvts_ctrl_set_enable(&lvts_td->lvts_ctrl[i], true); + usleep_range(100, 200); + lvts_ctrl_monitor_enable(dev, &lvts_td->lvts_ctrl[i], true); + } return 0; } diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c index c2d59cbfaea9..a81e7d6e865f 100644 --- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c +++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c @@ -360,7 +360,6 @@ static int qpnp_tm_probe(struct platform_device *pdev) if (!chip) return -ENOMEM; - dev_set_drvdata(&pdev->dev, chip); chip->dev = &pdev->dev; mutex_init(&chip->lock); diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 0cb7301eca6e..8d9698ea3ec4 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -4,13 +4,32 @@ * Copyright (c) 2018, Linaro Limited */ +#include <linux/bitfield.h> #include <linux/bitops.h> +#include <linux/nvmem-consumer.h> #include <linux/regmap.h> #include "tsens.h" /* ----- SROT ------ */ #define SROT_HW_VER_OFF 0x0000 #define SROT_CTRL_OFF 0x0004 +#define SROT_MEASURE_PERIOD 0x0008 +#define SROT_Sn_CONVERSION 0x0060 +#define V2_SHIFT_DEFAULT 0x0003 +#define V2_SLOPE_DEFAULT 0x0cd0 +#define V2_CZERO_DEFAULT 0x016a +#define ONE_PT_SLOPE 0x0cd0 +#define TWO_PT_SHIFTED_GAIN 921600 +#define ONE_PT_CZERO_CONST 94 +#define SW_RST_DEASSERT 0x0 +#define SW_RST_ASSERT 0x1 +#define MEASURE_PERIOD_2mSEC 0x1 +#define RESULT_FORMAT_TEMP 0x1 +#define TSENS_ENABLE 0x1 +#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION) +#define CONVERSION_SHIFT_MASK GENMASK(24, 23) +#define CONVERSION_SLOPE_MASK GENMASK(22, 10) +#define CONVERSION_CZERO_MASK GENMASK(9, 0) /* ----- TM ------ */ #define TM_INT_EN_OFF 0x0004 @@ -50,6 +69,17 @@ static struct tsens_features ipq8074_feat = { .trip_max_temp = 204000, }; +static struct tsens_features ipq5332_feat = { + .ver_major = VER_2_X_NO_RPM, + .crit_int = 1, + .combo_int = 1, + .adc = 0, + .srot_split = 1, + .max_sensors = 16, + .trip_min_temp = 0, + .trip_max_temp = 204000, +}; + static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { /* ----- SROT ------ */ /* VERSION */ @@ -59,6 +89,10 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { /* CTRL_OFF */ [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0), [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1), + [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18), + [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21), + + [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7), /* ----- TM ------ */ /* INTERRUPT ENABLE */ @@ -104,6 +138,128 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = { [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0), }; +static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor, + struct regmap *map, u32 mode, u32 base0, u32 base1) +{ + u32 shift = V2_SHIFT_DEFAULT; + u32 slope = V2_SLOPE_DEFAULT; + u32 czero = V2_CZERO_DEFAULT; + char name[20]; + u32 val; + int ret; + + /* Read offset value */ + ret = snprintf(name, sizeof(name), "tsens_sens%d_off", sensor->hw_id); + if (ret < 0) + return ret; + + ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset); + if (ret) + return ret; + + /* Based on calib mode, program SHIFT, SLOPE and CZERO */ + switch (mode) { + case TWO_PT_CALIB: + slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0)); + + czero = (base0 + sensor->offset - ((base1 - base0) / 3)); + + break; + case ONE_PT_CALIB2: + czero = base0 + sensor->offset - ONE_PT_CZERO_CONST; + + slope = ONE_PT_SLOPE; + + break; + default: + dev_dbg(dev, "calibrationless mode\n"); + } + + val = FIELD_PREP(CONVERSION_SHIFT_MASK, shift) | + FIELD_PREP(CONVERSION_SLOPE_MASK, slope) | + FIELD_PREP(CONVERSION_CZERO_MASK, czero); + + regmap_write(map, SENSOR_CONVERSION(sensor->hw_id), val); + + return 0; +} + +static int tsens_v2_calibration(struct tsens_priv *priv) +{ + struct device *dev = priv->dev; + u32 mode, base0, base1; + int i, ret; + + if (priv->num_sensors > MAX_SENSORS) + return -EINVAL; + + ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode); + if (ret == -ENOENT) + dev_warn(priv->dev, "Calibration data not present in DT\n"); + if (ret < 0) + return ret; + + dev_dbg(priv->dev, "calibration mode is %d\n", mode); + + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0); + if (ret < 0) + return ret; + + ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1); + if (ret < 0) + return ret; + + /* Calibrate each sensor */ + for (i = 0; i < priv->num_sensors; i++) { + ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map, + mode, base0, base1); + if (ret < 0) + return ret; + } + + return 0; +} + +static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv) +{ + struct device *dev = priv->dev; + int i, ret; + u32 val = 0; + + ret = init_common(priv); + if (ret < 0) + return ret; + + priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map, + priv->fields[CODE_OR_TEMP]); + if (IS_ERR(priv->rf[CODE_OR_TEMP])) + return PTR_ERR(priv->rf[CODE_OR_TEMP]); + + priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map, + priv->fields[MAIN_MEASURE_PERIOD]); + if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD])) + return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]); + + regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_ASSERT); + + regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], MEASURE_PERIOD_2mSEC); + + /* Enable available sensors */ + for (i = 0; i < priv->num_sensors; i++) + val |= 1 << priv->sensor[i].hw_id; + + regmap_field_write(priv->rf[SENSOR_EN], val); + + /* Select temperature format, unit is deci-Celsius */ + regmap_field_write(priv->rf[CODE_OR_TEMP], RESULT_FORMAT_TEMP); + + regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_DEASSERT); + + regmap_field_write(priv->rf[TSENS_EN], TSENS_ENABLE); + + return 0; +} + static const struct tsens_ops ops_generic_v2 = { .init = init_common, .get_temp = get_temp_tsens_valid, @@ -122,6 +278,28 @@ struct tsens_plat_data data_ipq8074 = { .fields = tsens_v2_regfields, }; +static const struct tsens_ops ops_ipq5332 = { + .init = init_tsens_v2_no_rpm, + .get_temp = get_temp_tsens_valid, + .calibrate = tsens_v2_calibration, +}; + +const struct tsens_plat_data data_ipq5332 = { + .num_sensors = 5, + .ops = &ops_ipq5332, + .hw_ids = (unsigned int []){11, 12, 13, 14, 15}, + .feat = &ipq5332_feat, + .fields = tsens_v2_regfields, +}; + +const struct tsens_plat_data data_ipq5424 = { + .num_sensors = 7, + .ops = &ops_ipq5332, + .hw_ids = (unsigned int []){9, 10, 11, 12, 13, 14, 15}, + .feat = &ipq5332_feat, + .fields = tsens_v2_regfields, +}; + /* Kept around for backward compatibility with old msm8996.dtsi */ struct tsens_plat_data data_8996 = { .num_sensors = 13, diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index 3aa3736181aa..1f5d4de017d9 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv *priv) ret = regmap_field_read(priv->rf[TSENS_EN], &enabled); if (ret) goto err_put_device; - if (!enabled) { + if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) { dev_err(dev, "%s: device not enabled\n", __func__); ret = -ENODEV; goto err_put_device; @@ -1102,6 +1102,12 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume); static const struct of_device_id tsens_table[] = { { + .compatible = "qcom,ipq5332-tsens", + .data = &data_ipq5332, + }, { + .compatible = "qcom,ipq5424-tsens", + .data = &data_ipq5424, + }, { .compatible = "qcom,ipq8064-tsens", .data = &data_8960, }, { diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 7b36a0318fa6..336bc868fd7c 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -35,6 +35,7 @@ enum tsens_ver { VER_0_1, VER_1_X, VER_2_X, + VER_2_X_NO_RPM, }; enum tsens_irq_type { @@ -168,6 +169,7 @@ enum regfield_ids { TSENS_SW_RST, SENSOR_EN, CODE_OR_TEMP, + MAIN_MEASURE_PERIOD, /* ----- TM ------ */ /* TRDY */ @@ -651,5 +653,6 @@ extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956; /* TSENS v2 targets */ extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2; +extern const struct tsens_plat_data data_ipq5332, data_ipq5424; #endif /* __QCOM_TSENS_H__ */ diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c index 52e26be8c53d..01b58be0dcc6 100644 --- a/drivers/thermal/qoriq_thermal.c +++ b/drivers/thermal/qoriq_thermal.c @@ -18,6 +18,7 @@ #define SITES_MAX 16 #define TMR_DISABLE 0x0 #define TMR_ME 0x80000000 +#define TMR_CMD BIT(29) #define TMR_ALPF 0x0c000000 #define TMR_ALPF_V2 0x03000000 #define TMTMIR_DEFAULT 0x0000000f @@ -265,7 +266,6 @@ static void qoriq_tmu_action(void *p) struct qoriq_tmu_data *data = p; regmap_write(data->regmap, REGS_TMR, TMR_DISABLE); - clk_disable_unprepare(data->clk); } static int qoriq_tmu_probe(struct platform_device *pdev) @@ -296,38 +296,27 @@ static int qoriq_tmu_probe(struct platform_device *pdev) base = devm_platform_ioremap_resource(pdev, 0); ret = PTR_ERR_OR_ZERO(base); - if (ret) { - dev_err(dev, "Failed to get memory region\n"); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to get memory region\n"); data->regmap = devm_regmap_init_mmio(dev, base, ®map_config); ret = PTR_ERR_OR_ZERO(data->regmap); - if (ret) { - dev_err(dev, "Failed to init regmap (%d)\n", ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to init regmap\n"); - data->clk = devm_clk_get_optional(dev, NULL); + data->clk = devm_clk_get_optional_enabled(dev, NULL); if (IS_ERR(data->clk)) return PTR_ERR(data->clk); - ret = clk_prepare_enable(data->clk); - if (ret) { - dev_err(dev, "Failed to enable clock\n"); - return ret; - } - ret = devm_add_action_or_reset(dev, qoriq_tmu_action, data); if (ret) return ret; /* version register offset at: 0xbf8 on both v1 and v2 */ ret = regmap_read(data->regmap, REGS_IPBRR(0), &ver); - if (ret) { - dev_err(&pdev->dev, "Failed to read IP block version\n"); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "Failed to read IP block version\n"); + data->ver = (ver >> 8) & 0xff; qoriq_tmu_init_device(data); /* TMU initialization */ @@ -337,10 +326,8 @@ static int qoriq_tmu_probe(struct platform_device *pdev) return ret; ret = qoriq_tmu_register_tmu_zone(dev, data); - if (ret < 0) { - dev_err(dev, "Failed to register sensors\n"); - return ret; - } + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to register sensors\n"); platform_set_drvdata(pdev, data); @@ -356,6 +343,12 @@ static int qoriq_tmu_suspend(struct device *dev) if (ret) return ret; + if (data->ver > TMU_VER1) { + ret = regmap_set_bits(data->regmap, REGS_TMR, TMR_CMD); + if (ret) + return ret; + } + clk_disable_unprepare(data->clk); return 0; @@ -370,6 +363,12 @@ static int qoriq_tmu_resume(struct device *dev) if (ret) return ret; + if (data->ver > TMU_VER1) { + ret = regmap_clear_bits(data->regmap, REGS_TMR, TMR_CMD); + if (ret) + return ret; + } + /* Enable monitoring */ return regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, TMR_ME); } diff --git a/drivers/thermal/renesas/rcar_gen3_thermal.c b/drivers/thermal/renesas/rcar_gen3_thermal.c index 1ec169aeacfc..24a702ee4c1f 100644 --- a/drivers/thermal/renesas/rcar_gen3_thermal.c +++ b/drivers/thermal/renesas/rcar_gen3_thermal.c @@ -21,11 +21,11 @@ /* Register offsets */ #define REG_GEN3_IRQSTR 0x04 #define REG_GEN3_IRQMSK 0x08 -#define REG_GEN3_IRQCTL 0x0C +#define REG_GEN3_IRQCTL 0x0c #define REG_GEN3_IRQEN 0x10 #define REG_GEN3_IRQTEMP1 0x14 #define REG_GEN3_IRQTEMP2 0x18 -#define REG_GEN3_IRQTEMP3 0x1C +#define REG_GEN3_IRQTEMP3 0x1c #define REG_GEN3_THCTR 0x20 #define REG_GEN3_TEMP 0x28 #define REG_GEN3_THCODE1 0x50 @@ -38,9 +38,9 @@ #define REG_GEN4_THSFMON00 0x180 #define REG_GEN4_THSFMON01 0x184 #define REG_GEN4_THSFMON02 0x188 -#define REG_GEN4_THSFMON15 0x1BC -#define REG_GEN4_THSFMON16 0x1C0 -#define REG_GEN4_THSFMON17 0x1C4 +#define REG_GEN4_THSFMON15 0x1bc +#define REG_GEN4_THSFMON16 0x1c0 +#define REG_GEN4_THSFMON17 0x1c4 /* IRQ{STR,MSK,EN} bits */ #define IRQ_TEMP1 BIT(0) @@ -57,21 +57,27 @@ /* THSCP bits */ #define THSCP_COR_PARA_VLD (BIT(15) | BIT(14)) -#define CTEMP_MASK 0xFFF +#define CTEMP_MASK 0xfff #define MCELSIUS(temp) ((temp) * 1000) -#define GEN3_FUSE_MASK 0xFFF -#define GEN4_FUSE_MASK 0xFFF +#define GEN3_FUSE_MASK 0xfff +#define GEN4_FUSE_MASK 0xfff #define TSC_MAX_NUM 5 struct rcar_gen3_thermal_priv; +struct rcar_gen3_thermal_fuse_info { + u32 ptat[3]; + u32 thcode[3]; + u32 mask; +}; + struct rcar_thermal_info { int scale; int adj_below; int adj_above; - void (*read_fuses)(struct rcar_gen3_thermal_priv *priv); + const struct rcar_gen3_thermal_fuse_info *fuses; }; struct equation_set_coef { @@ -253,59 +259,31 @@ static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data) return IRQ_HANDLED; } -static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *priv) +static void rcar_gen3_thermal_fetch_fuses(struct rcar_gen3_thermal_priv *priv) { - unsigned int i; + const struct rcar_gen3_thermal_fuse_info *fuses = priv->info->fuses; /* * Set the pseudo calibration points with fused values. * PTAT is shared between all TSCs but only fused for the first * TSC while THCODEs are fused for each TSC. */ - priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) & - GEN3_FUSE_MASK; - priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) & - GEN3_FUSE_MASK; - priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) & - GEN3_FUSE_MASK; - - for (i = 0; i < priv->num_tscs; i++) { + priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], fuses->ptat[0]) + & fuses->mask; + priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], fuses->ptat[1]) + & fuses->mask; + priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], fuses->ptat[2]) + & fuses->mask; + + for (unsigned int i = 0; i < priv->num_tscs; i++) { struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; - tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) & - GEN3_FUSE_MASK; - tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) & - GEN3_FUSE_MASK; - tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) & - GEN3_FUSE_MASK; - } -} - -static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv) -{ - unsigned int i; - - /* - * Set the pseudo calibration points with fused values. - * PTAT is shared between all TSCs but only fused for the first - * TSC while THCODEs are fused for each TSC. - */ - priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON16) & - GEN4_FUSE_MASK; - priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON17) & - GEN4_FUSE_MASK; - priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON15) & - GEN4_FUSE_MASK; - - for (i = 0; i < priv->num_tscs; i++) { - struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; - - tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON01) & - GEN4_FUSE_MASK; - tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON02) & - GEN4_FUSE_MASK; - tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON00) & - GEN4_FUSE_MASK; + tsc->thcode[0] = rcar_gen3_thermal_read(tsc, fuses->thcode[0]) + & fuses->mask; + tsc->thcode[1] = rcar_gen3_thermal_read(tsc, fuses->thcode[1]) + & fuses->mask; + tsc->thcode[2] = rcar_gen3_thermal_read(tsc, fuses->thcode[2]) + & fuses->mask; } } @@ -316,7 +294,7 @@ static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) /* If fuses are not set, fallback to pseudo values. */ thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP); - if (!priv->info->read_fuses || + if (!priv->info->fuses || (thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) { /* Default THCODE values in case FUSEs are not set. */ static const int thcodes[TSC_MAX_NUM][3] = { @@ -342,7 +320,8 @@ static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) return false; } - priv->info->read_fuses(priv); + rcar_gen3_thermal_fetch_fuses(priv); + return true; } @@ -370,25 +349,37 @@ static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv, usleep_range(1000, 2000); } +static const struct rcar_gen3_thermal_fuse_info rcar_gen3_thermal_fuse_info_gen3 = { + .ptat = { REG_GEN3_PTAT1, REG_GEN3_PTAT2, REG_GEN3_PTAT3 }, + .thcode = { REG_GEN3_THCODE1, REG_GEN3_THCODE2, REG_GEN3_THCODE3 }, + .mask = GEN3_FUSE_MASK, +}; + +static const struct rcar_gen3_thermal_fuse_info rcar_gen3_thermal_fuse_info_gen4 = { + .ptat = { REG_GEN4_THSFMON16, REG_GEN4_THSFMON17, REG_GEN4_THSFMON15 }, + .thcode = { REG_GEN4_THSFMON01, REG_GEN4_THSFMON02, REG_GEN4_THSFMON00 }, + .mask = GEN4_FUSE_MASK, +}; + static const struct rcar_thermal_info rcar_m3w_thermal_info = { .scale = 157, .adj_below = -41, .adj_above = 116, - .read_fuses = rcar_gen3_thermal_read_fuses_gen3, + .fuses = &rcar_gen3_thermal_fuse_info_gen3, }; static const struct rcar_thermal_info rcar_gen3_thermal_info = { .scale = 167, .adj_below = -41, .adj_above = 126, - .read_fuses = rcar_gen3_thermal_read_fuses_gen3, + .fuses = &rcar_gen3_thermal_fuse_info_gen3, }; static const struct rcar_thermal_info rcar_gen4_thermal_info = { .scale = 167, .adj_below = -41, .adj_above = 126, - .read_fuses = rcar_gen3_thermal_read_fuses_gen4, + .fuses = &rcar_gen3_thermal_fuse_info_gen4, }; static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index f551df48eef9..a8ad85feb68f 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -386,6 +386,7 @@ static const struct tsadc_table rk3328_code_table[] = { {296, -40000}, {304, -35000}, {313, -30000}, + {322, -25000}, {331, -20000}, {340, -15000}, {349, -10000}, diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c index 2328ac0d8561..17ca5c082643 100644 --- a/drivers/thermal/thermal_core.c +++ b/drivers/thermal/thermal_core.c @@ -369,7 +369,8 @@ void thermal_governor_update_tz(struct thermal_zone_device *tz, tz->governor->update_tz(tz, reason); } -static void thermal_zone_device_halt(struct thermal_zone_device *tz, bool shutdown) +static void thermal_zone_device_halt(struct thermal_zone_device *tz, + enum hw_protection_action action) { /* * poweroff_delay_ms must be a carefully profiled positive value. @@ -380,21 +381,23 @@ static void thermal_zone_device_halt(struct thermal_zone_device *tz, bool shutdo dev_emerg(&tz->device, "%s: critical temperature reached\n", tz->type); - if (shutdown) - hw_protection_shutdown(msg, poweroff_delay_ms); - else - hw_protection_reboot(msg, poweroff_delay_ms); + __hw_protection_trigger(msg, poweroff_delay_ms, action); } void thermal_zone_device_critical(struct thermal_zone_device *tz) { - thermal_zone_device_halt(tz, true); + thermal_zone_device_halt(tz, HWPROT_ACT_DEFAULT); } EXPORT_SYMBOL(thermal_zone_device_critical); +void thermal_zone_device_critical_shutdown(struct thermal_zone_device *tz) +{ + thermal_zone_device_halt(tz, HWPROT_ACT_SHUTDOWN); +} + void thermal_zone_device_critical_reboot(struct thermal_zone_device *tz) { - thermal_zone_device_halt(tz, false); + thermal_zone_device_halt(tz, HWPROT_ACT_REBOOT); } static void handle_critical_trips(struct thermal_zone_device *tz, @@ -1589,26 +1592,26 @@ thermal_zone_device_register_with_trips(const char *type, tz->state = TZ_STATE_FLAG_INIT; + result = dev_set_name(&tz->device, "thermal_zone%d", tz->id); + if (result) + goto remove_id; + + thermal_zone_device_init(tz); + + result = thermal_zone_init_governor(tz); + if (result) + goto remove_id; + /* sys I/F */ /* Add nodes that are always present via .groups */ result = thermal_zone_create_device_groups(tz); if (result) goto remove_id; - result = dev_set_name(&tz->device, "thermal_zone%d", tz->id); - if (result) { - thermal_zone_destroy_device_groups(tz); - goto remove_id; - } - thermal_zone_device_init(tz); result = device_register(&tz->device); if (result) goto release_device; - result = thermal_zone_init_governor(tz); - if (result) - goto unregister; - if (!tz->tzp || !tz->tzp->no_hwmon) { result = thermal_add_hwmon_sysfs(tz); if (result) diff --git a/drivers/thermal/thermal_core.h b/drivers/thermal/thermal_core.h index 09866f0ce765..bdadd141aa24 100644 --- a/drivers/thermal/thermal_core.h +++ b/drivers/thermal/thermal_core.h @@ -262,6 +262,7 @@ int thermal_build_list_of_policies(char *buf); void __thermal_zone_device_update(struct thermal_zone_device *tz, enum thermal_notify_event event); void thermal_zone_device_critical_reboot(struct thermal_zone_device *tz); +void thermal_zone_device_critical_shutdown(struct thermal_zone_device *tz); void thermal_governor_update_tz(struct thermal_zone_device *tz, enum thermal_notify_event reason); diff --git a/drivers/thermal/thermal_debugfs.c b/drivers/thermal/thermal_debugfs.c index c800504c3cfe..11d34f2a3d9f 100644 --- a/drivers/thermal/thermal_debugfs.c +++ b/drivers/thermal/thermal_debugfs.c @@ -319,7 +319,7 @@ static int cdev_tt_seq_show(struct seq_file *s, void *v) int i = *(loff_t *)v; if (!i) - seq_puts(s, "Transition\tOccurences\n"); + seq_puts(s, "Transition\tOccurrences\n"); list_for_each_entry(entry, &transitions[i], node) { /* @@ -876,7 +876,7 @@ void thermal_debug_tz_add(struct thermal_zone_device *tz) tz_dbg->tz = tz; - tz_dbg->trips_crossed = kzalloc(sizeof(int) * tz->num_trips, GFP_KERNEL); + tz_dbg->trips_crossed = kcalloc(tz->num_trips, sizeof(int), GFP_KERNEL); if (!tz_dbg->trips_crossed) { thermal_debugfs_remove_id(thermal_dbg); return; diff --git a/drivers/thermal/thermal_of.c b/drivers/thermal/thermal_of.c index 5401f03d6b6c..1a51a4d240ff 100644 --- a/drivers/thermal/thermal_of.c +++ b/drivers/thermal/thermal_of.c @@ -107,7 +107,7 @@ static struct thermal_trip *thermal_of_trips_init(struct device_node *np, int *n if (!count) return NULL; - struct thermal_trip *tt __free(kfree) = kzalloc(sizeof(*tt) * count, GFP_KERNEL); + struct thermal_trip *tt __free(kfree) = kcalloc(count, sizeof(*tt), GFP_KERNEL); if (!tt) return ERR_PTR(-ENOMEM); @@ -405,9 +405,12 @@ static struct thermal_zone_device *thermal_of_zone_register(struct device_node * of_ops.should_bind = thermal_of_should_bind; ret = of_property_read_string(np, "critical-action", &action); - if (!ret) - if (!of_ops.critical && !strcasecmp(action, "reboot")) + if (!ret && !of_ops.critical) { + if (!strcasecmp(action, "reboot")) of_ops.critical = thermal_zone_device_critical_reboot; + else if (!strcasecmp(action, "shutdown")) + of_ops.critical = thermal_zone_device_critical_shutdown; + } tz = thermal_zone_device_register_with_trips(np->name, trips, ntrips, data, &of_ops, &tzp, |