diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/clk-private.h | 99 | ||||
| -rw-r--r-- | include/linux/clk-provider.h | 120 | ||||
| -rw-r--r-- | include/linux/clk.h | 6 | ||||
| -rw-r--r-- | include/linux/mv643xx_eth.h | 1 | ||||
| -rw-r--r-- | include/linux/spi/orion_spi.h | 17 |
5 files changed, 130 insertions, 113 deletions
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h index 5e4312b6f5cc..eb3f84bc5325 100644 --- a/include/linux/clk-private.h +++ b/include/linux/clk-private.h @@ -30,7 +30,7 @@ struct clk { const struct clk_ops *ops; struct clk_hw *hw; struct clk *parent; - char **parent_names; + const char **parent_names; struct clk **parents; u8 num_parents; unsigned long rate; @@ -55,12 +55,22 @@ struct clk { * alternative macro for static initialization */ -extern struct clk_ops clk_fixed_rate_ops; +#define DEFINE_CLK(_name, _ops, _flags, _parent_names, \ + _parents) \ + static struct clk _name = { \ + .name = #_name, \ + .ops = &_ops, \ + .hw = &_name##_hw.hw, \ + .parent_names = _parent_names, \ + .num_parents = ARRAY_SIZE(_parent_names), \ + .parents = _parents, \ + .flags = _flags, \ + } #define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \ _fixed_rate_flags) \ static struct clk _name; \ - static char *_name##_parent_names[] = {}; \ + static const char *_name##_parent_names[] = {}; \ static struct clk_fixed_rate _name##_hw = { \ .hw = { \ .clk = &_name, \ @@ -68,23 +78,14 @@ extern struct clk_ops clk_fixed_rate_ops; .fixed_rate = _rate, \ .flags = _fixed_rate_flags, \ }; \ - static struct clk _name = { \ - .name = #_name, \ - .ops = &clk_fixed_rate_ops, \ - .hw = &_name##_hw.hw, \ - .parent_names = _name##_parent_names, \ - .num_parents = \ - ARRAY_SIZE(_name##_parent_names), \ - .flags = _flags, \ - }; - -extern struct clk_ops clk_gate_ops; + DEFINE_CLK(_name, clk_fixed_rate_ops, _flags, \ + _name##_parent_names, NULL); #define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \ _flags, _reg, _bit_idx, \ _gate_flags, _lock) \ static struct clk _name; \ - static char *_name##_parent_names[] = { \ + static const char *_name##_parent_names[] = { \ _parent_name, \ }; \ static struct clk *_name##_parents[] = { \ @@ -99,24 +100,14 @@ extern struct clk_ops clk_gate_ops; .flags = _gate_flags, \ .lock = _lock, \ }; \ - static struct clk _name = { \ - .name = #_name, \ - .ops = &clk_gate_ops, \ - .hw = &_name##_hw.hw, \ - .parent_names = _name##_parent_names, \ - .num_parents = \ - ARRAY_SIZE(_name##_parent_names), \ - .parents = _name##_parents, \ - .flags = _flags, \ - }; - -extern struct clk_ops clk_divider_ops; + DEFINE_CLK(_name, clk_gate_ops, _flags, \ + _name##_parent_names, _name##_parents); #define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ _flags, _reg, _shift, _width, \ _divider_flags, _lock) \ static struct clk _name; \ - static char *_name##_parent_names[] = { \ + static const char *_name##_parent_names[] = { \ _parent_name, \ }; \ static struct clk *_name##_parents[] = { \ @@ -132,18 +123,8 @@ extern struct clk_ops clk_divider_ops; .flags = _divider_flags, \ .lock = _lock, \ }; \ - static struct clk _name = { \ - .name = #_name, \ - .ops = &clk_divider_ops, \ - .hw = &_name##_hw.hw, \ - .parent_names = _name##_parent_names, \ - .num_parents = \ - ARRAY_SIZE(_name##_parent_names), \ - .parents = _name##_parents, \ - .flags = _flags, \ - }; - -extern struct clk_ops clk_mux_ops; + DEFINE_CLK(_name, clk_divider_ops, _flags, \ + _name##_parent_names, _name##_parents); #define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \ _reg, _shift, _width, \ @@ -159,16 +140,28 @@ extern struct clk_ops clk_mux_ops; .flags = _mux_flags, \ .lock = _lock, \ }; \ - static struct clk _name = { \ - .name = #_name, \ - .ops = &clk_mux_ops, \ - .hw = &_name##_hw.hw, \ - .parent_names = _parent_names, \ - .num_parents = \ - ARRAY_SIZE(_parent_names), \ - .parents = _parents, \ - .flags = _flags, \ - }; + DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \ + _parents); + +#define DEFINE_CLK_FIXED_FACTOR(_name, _parent_name, \ + _parent_ptr, _flags, \ + _mult, _div) \ + static struct clk _name; \ + static const char *_name##_parent_names[] = { \ + _parent_name, \ + }; \ + static struct clk *_name##_parents[] = { \ + _parent_ptr, \ + }; \ + static struct clk_fixed_factor _name##_hw = { \ + .hw = { \ + .clk = &_name, \ + }, \ + .mult = _mult, \ + .div = _div, \ + }; \ + DEFINE_CLK(_name, clk_fixed_factor_ops, _flags, \ + _name##_parent_names, _name##_parents); /** * __clk_init - initialize the data structures in a struct clk @@ -189,8 +182,12 @@ extern struct clk_ops clk_mux_ops; * * It is not necessary to call clk_register if __clk_init is used directly with * statically initialized clock data. + * + * Returns 0 on success, otherwise an error code. */ -void __clk_init(struct device *dev, struct clk *clk); +int __clk_init(struct device *dev, struct clk *clk); + +struct clk *__clk_register(struct device *dev, struct clk_hw *hw); #endif /* CONFIG_COMMON_CLK */ #endif /* CLK_PRIVATE_H */ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 5508897ad376..4a0b483986c3 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -15,19 +15,6 @@ #ifdef CONFIG_COMMON_CLK -/** - * struct clk_hw - handle for traversing from a struct clk to its corresponding - * hardware-specific structure. struct clk_hw should be declared within struct - * clk_foo and then referenced by the struct clk instance that uses struct - * clk_foo's clk_ops - * - * clk: pointer to the struct clk instance that points back to this struct - * clk_hw instance - */ -struct clk_hw { - struct clk *clk; -}; - /* * flags used across common struct clk. these flags should only affect the * top-level framework. custom flags for dealing with hardware specifics @@ -39,6 +26,8 @@ struct clk_hw { #define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ #define CLK_IS_ROOT BIT(4) /* root clk, has no parent */ +struct clk_hw; + /** * struct clk_ops - Callback operations for hardware clocks; these are to * be provided by the clock implementation, and will be called by drivers @@ -88,19 +77,11 @@ struct clk_hw { * array index into the value programmed into the hardware. * Returns 0 on success, -EERROR otherwise. * - * @set_rate: Change the rate of this clock. If this callback returns - * CLK_SET_RATE_PARENT, the rate change will be propagated to the - * parent clock (which may propagate again if the parent clock - * also sets this flag). The requested rate of the parent is - * passed back from the callback in the second 'unsigned long *' - * argument. Note that it is up to the hardware clock's set_rate - * implementation to insure that clocks do not run out of spec - * when propgating the call to set_rate up to the parent. One way - * to do this is to gate the clock (via clk_disable and/or - * clk_unprepare) before calling clk_set_rate, then ungating it - * afterward. If your clock also has the CLK_GATE_SET_RATE flag - * set then this will insure safety. Returns 0 on success, - * -EERROR otherwise. + * @set_rate: Change the rate of this clock. The requested rate is specified + * by the second argument, which should typically be the return + * of .round_rate call. The third argument gives the parent rate + * which is likely helpful for most .set_rate implementation. + * Returns 0 on success, -EERROR otherwise. * * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow * implementations to split any work between atomic (enable) and sleepable @@ -125,10 +106,46 @@ struct clk_ops { unsigned long *); int (*set_parent)(struct clk_hw *hw, u8 index); u8 (*get_parent)(struct clk_hw *hw); - int (*set_rate)(struct clk_hw *hw, unsigned long); + int (*set_rate)(struct clk_hw *hw, unsigned long, + unsigned long); void (*init)(struct clk_hw *hw); }; +/** + * struct clk_init_data - holds init data that's common to all clocks and is + * shared between the clock provider and the common clock framework. + * + * @name: clock name + * @ops: operations this clock supports + * @parent_names: array of string names for all possible parents + * @num_parents: number of possible parents + * @flags: framework-level hints and quirks + */ +struct clk_init_data { + const char *name; + const struct clk_ops *ops; + const char **parent_names; + u8 num_parents; + unsigned long flags; +}; + +/** + * struct clk_hw - handle for traversing from a struct clk to its corresponding + * hardware-specific structure. struct clk_hw should be declared within struct + * clk_foo and then referenced by the struct clk instance that uses struct + * clk_foo's clk_ops + * + * @clk: pointer to the struct clk instance that points back to this struct + * clk_hw instance + * + * @init: pointer to struct clk_init_data that contains the init data shared + * with the common clock framework. + */ +struct clk_hw { + struct clk *clk; + struct clk_init_data *init; +}; + /* * DOC: Basic clock implementations common to many platforms * @@ -149,6 +166,7 @@ struct clk_fixed_rate { u8 flags; }; +extern const struct clk_ops clk_fixed_rate_ops; struct clk *clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate); @@ -165,7 +183,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, * Clock which can gate its output. Implements .enable & .disable * * Flags: - * CLK_GATE_SET_DISABLE - by default this clock sets the bit at bit_idx to + * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to * enable the clock. Setting this flag does the opposite: setting the bit * disable the clock and clearing it enables the clock */ @@ -175,11 +193,11 @@ struct clk_gate { u8 bit_idx; u8 flags; spinlock_t *lock; - char *parent[1]; }; #define CLK_GATE_SET_TO_DISABLE BIT(0) +extern const struct clk_ops clk_gate_ops; struct clk *clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, @@ -212,12 +230,12 @@ struct clk_divider { u8 width; u8 flags; spinlock_t *lock; - char *parent[1]; }; #define CLK_DIVIDER_ONE_BASED BIT(0) #define CLK_DIVIDER_POWER_OF_TWO BIT(1) +extern const struct clk_ops clk_divider_ops; struct clk *clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, @@ -238,7 +256,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name, * * Flags: * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 - * CLK_MUX_INDEX_BITWISE - register index is a single bit (power of two) + * CLK_MUX_INDEX_BIT - register index is a single bit (power of two) */ struct clk_mux { struct clk_hw hw; @@ -252,29 +270,49 @@ struct clk_mux { #define CLK_MUX_INDEX_ONE BIT(0) #define CLK_MUX_INDEX_BIT BIT(1) +extern const struct clk_ops clk_mux_ops; struct clk *clk_register_mux(struct device *dev, const char *name, - char **parent_names, u8 num_parents, unsigned long flags, + const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock); /** + * struct clk_fixed_factor - fixed multiplier and divider clock + * + * @hw: handle between common and hardware-specific interfaces + * @mult: multiplier + * @div: divider + * + * Clock with a fixed multiplier and divider. The output frequency is the + * parent clock rate divided by div and multiplied by mult. + * Implements .recalc_rate, .set_rate and .round_rate + */ + +struct clk_fixed_factor { + struct clk_hw hw; + unsigned int mult; + unsigned int div; +}; + +extern struct clk_ops clk_fixed_factor_ops; +struct clk *clk_register_fixed_factor(struct device *dev, const char *name, + const char *parent_name, unsigned long flags, + unsigned int mult, unsigned int div); + +/** * clk_register - allocate a new clock, register it and return an opaque cookie * @dev: device that is registering this clock - * @name: clock name - * @ops: operations this clock supports * @hw: link to hardware-specific clock data - * @parent_names: array of string names for all possible parents - * @num_parents: number of possible parents - * @flags: framework-level hints and quirks * * clk_register is the primary interface for populating the clock tree with new * clock nodes. It returns a pointer to the newly allocated struct clk which * cannot be dereferenced by driver code but may be used in conjuction with the - * rest of the clock API. + * rest of the clock API. In the event of an error clk_register will return an + * error code; drivers must test for an error code after calling clk_register. */ -struct clk *clk_register(struct device *dev, const char *name, - const struct clk_ops *ops, struct clk_hw *hw, - char **parent_names, u8 num_parents, unsigned long flags); +struct clk *clk_register(struct device *dev, struct clk_hw *hw); + +void clk_unregister(struct clk *clk); /* helper functions */ const char *__clk_get_name(struct clk *clk); diff --git a/include/linux/clk.h b/include/linux/clk.h index 70cf722ac3af..ad5c43e8ae8a 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -81,7 +81,7 @@ int clk_notifier_register(struct clk *clk, struct notifier_block *nb); int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb); -#endif /* !CONFIG_COMMON_CLK */ +#endif /** * clk_get - lookup and obtain a reference to a clock producer. @@ -252,7 +252,7 @@ void devm_clk_put(struct device *dev, struct clk *clk); * Returns rounded clock rate in Hz, or negative errno. */ long clk_round_rate(struct clk *clk, unsigned long rate); - + /** * clk_set_rate - set the clock rate for a clock source * @clk: clock source @@ -261,7 +261,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate); * Returns success (0) or negative errno. */ int clk_set_rate(struct clk *clk, unsigned long rate); - + /** * clk_set_parent - set the parent clock source for this clock * @clk: clock source diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 30b0c4e78f91..51bf8ada6dc0 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -18,7 +18,6 @@ struct mv643xx_eth_shared_platform_data { struct mbus_dram_target_info *dram; struct platform_device *shared_smi; - unsigned int t_clk; /* * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default * limit of 9KiB will be used. diff --git a/include/linux/spi/orion_spi.h b/include/linux/spi/orion_spi.h deleted file mode 100644 index b4d9fa6f797c..000000000000 --- a/include/linux/spi/orion_spi.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * orion_spi.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __LINUX_SPI_ORION_SPI_H -#define __LINUX_SPI_ORION_SPI_H - -struct orion_spi_info { - u32 tclk; /* no <linux/clk.h> support yet */ -}; - - -#endif |