diff options
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/amdzen1/cache.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/amdzen1/cache.json | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json index 404d4c569c01..695ed3ffa3a6 100644 --- a/tools/perf/pmu-events/arch/x86/amdzen1/cache.json +++ b/tools/perf/pmu-events/arch/x86/amdzen1/cache.json @@ -250,6 +250,24 @@ "UMask": "0x1" }, { + "EventName": "l2_pf_hit_l2", + "EventCode": "0x70", + "BriefDescription": "L2 prefetch hit in L2.", + "UMask": "0xff" + }, + { + "EventName": "l2_pf_miss_l2_hit_l3", + "EventCode": "0x71", + "BriefDescription": "L2 prefetcher hits in L3. Counts all L2 prefetches accepted by the L2 pipeline which miss the L2 cache and hit the L3.", + "UMask": "0xff" + }, + { + "EventName": "l2_pf_miss_l2_l3", + "EventCode": "0x72", + "BriefDescription": "L2 prefetcher misses in L3. All L2 prefetches accepted by the L2 pipeline which miss the L2 and the L3 caches.", + "UMask": "0xff" + }, + { "EventName": "l3_request_g1.caching_l3_cache_accesses", "EventCode": "0x01", "BriefDescription": "Caching: L3 cache accesses", |