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* Merge branch 'for-3.12' of ↵Linus Torvalds2013-09-0324-427/+423
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata changes from Tejun Heo: "Two interesting changes. - libata acpi handling has been restructured so that the association between ata devices and ACPI handles are less convoluted. This change shouldn't change visible behavior. - Queued TRIM support, which enables sending TRIM to the device without draining in-flight RW commands, is added. Currently only enabled for ahci (and likely to stay that way for the foreseeable future). Other changes are driver-specific updates / fixes" * 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: libata: bugfix: Remove __le32 in ata_tf_to_fis() libata: acpi: Remove ata_dev_acpi_handle stub in libata.h libata: Add support for queued DSM TRIM libata: Add support for SEND/RECEIVE FPDMA QUEUED libata: Add H2D FIS "auxiliary" port flag libata: Populate host-to-device FIS "auxiliary" field ata: acpi: rework the ata acpi bind support sata, highbank: send extra clock cycles in SGPIO patterns sata, highbank: set tx_atten override bits devicetree: create a separate binding description for sata_highbank drivers/ata/sata_rcar.c: simplify use of devm_ioremap_resource sata highbank: enable 64-bit DMA mask when using LPAE ata: pata_samsung_cf: add missing __iomem annotation ata: pata_arasan: Staticize local symbols sata_mv: Remove unneeded CONFIG_HAVE_CLK ifdefs ata: use dev_get_platdata() sata_mv: Remove unneeded forward declaration libata: acpi: remove dead code for ata_acpi_(un)bind libata: move 'struct ata_taskfile' and friends from ata.h to libata.h
| * libata: bugfix: Remove __le32 in ata_tf_to_fis()Marc Carino2013-09-031-6/+4
| | | | | | | | | | | | | | | | The endianness attribute on the 'aux' local variable is wrong, and can lead to wrong endianness on big-endian machines, Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: acpi: Remove ata_dev_acpi_handle stub in libata.hAaron Lu2013-08-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The ata_dev_acpi_handle is defined in libata-acpi.c and the only external user is libata-zpodd.c, which is built when CONFIG_ATA_ACPI is set, so there is no need to make an empty stub function for ONFIG_ATA_ACPI case in libata.h. It also causes compile errors due to acpi_handle is not defined when !CONFIG_ACPI. This patch fixes this problem by removing the empty stub. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: Add support for queued DSM TRIMMarc Carino2013-08-252-6/+26
| | | | | | | | | | | | | | | | Some new SSDs support the queued version of the DSM TRIM command. Let the driver use the new command if supported. Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: Add support for SEND/RECEIVE FPDMA QUEUEDMarc Carino2013-08-253-0/+41
| | | | | | | | | | | | | | | | | | | | | | Add support for the following ATA opcodes, which are present in SATA 3.1 and T13 ATA ACS-3: SEND FPDMA QUEUED RECEIVE FPDMA QUEUED Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: Add H2D FIS "auxiliary" port flagMarc Carino2013-08-252-0/+9
| | | | | | | | | | | | | | | | Add a new port flag, ATA_FLAG_FPDMA_AUX, used to indicate support for transmission of the H2D FIS 'auxiliary' field. Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: Populate host-to-device FIS "auxiliary" fieldMarc Carino2013-08-252-4/+10
| | | | | | | | | | | | | | | | | | SATA 3.1 added an "auxiliary" field to the host-to-device FIS. Populate the host-to-device FIS with the new field via the taskfile struct. Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * ata: acpi: rework the ata acpi bind supportAaron Lu2013-08-239-248/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Binding ACPI handle to SCSI device has several drawbacks, namely: 1 During ATA device initialization time, ACPI handle will be needed while SCSI devices are not created yet. So each time ACPI handle is needed, instead of retrieving the handle by ACPI_HANDLE macro, a namespace scan is performed to find the handle for the corresponding ATA device. This is inefficient, and also expose a restriction on calling path not holding any lock. 2 The binding to SCSI device tree makes code complex, while at the same time doesn't bring us any benefit. All ACPI handlings are still done in ATA module, not in SCSI. Rework the ATA ACPI binding code to bind ACPI handle to ATA transport devices(ATA port and ATA device). The binding needs to be done only once, since the ATA transport devices do not go away with hotplug. And due to this, the flush_work call in hotplug handler for ATA bay is no longer needed. Tested on an Intel test platform for binding and runtime power off for ODD(ZPODD) and hard disk; on an ASUS S400C for binding and normal boot and S3, where its SATA port node has _SDD and _GTF control methods when configured as an AHCI controller and its PATA device node has _GTF control method when configured as an IDE controller. SATA PMP binding and ATA hotplug is not tested. Signed-off-by: Aaron Lu <aaron.lu@intel.com> Tested-by: Dirk Griesbach <spamthis@freenet.de> Signed-off-by: Tejun Heo <tj@kernel.org>
| * sata, highbank: send extra clock cycles in SGPIO patternsMark Langsdorf2013-08-142-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Some SGPIO PICs don't follow the standard very well and expect a certain number of clock cycles or port frames in each SGPIO pattern. Add two optional parameters in the DTB that can provide the number of extra clock cycles to be sent before and after SGPIO pattern. Read those parameters from the DTB and send the extra clock cycles. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * sata, highbank: set tx_atten override bitsMark Langsdorf2013-08-142-13/+49
| | | | | | | | | | | | | | | | | | | | | | | | Some board designs do not drive the SATA transmit lines within the specification. The ECME can provide override settings, on a per board basis, to bring the transmit lines within spec. Read those settings from the DTB and program them in. At the time of submission, no production hardware requires this patch. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * devicetree: create a separate binding description for sata_highbankMark Langsdorf2013-08-142-14/+38
| | | | | | | | | | | | | | | | | | | | The Calxeda sata_highbank driver has been adding its descriptions to the ahci driver. Separate them properly. This patch only affects documentation and has no functional component. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * drivers/ata/sata_rcar.c: simplify use of devm_ioremap_resourceJulia Lawall2013-08-141-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Tejun Heo <tj@kernel.org>
| * sata highbank: enable 64-bit DMA mask when using LPAERob Herring2013-08-091-0/+3
| | | | | | | | | | | | Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * ata: pata_samsung_cf: add missing __iomem annotationJingoo Han2013-08-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added missing __iomem annotation and staticized local symbol in order to fix the following sparse warnings: drivers/ata/pata_samsung_cf.c:244:14: warning: symbol 'pata_s3c_data_xfer' was not declared. Should it be static? drivers/ata/pata_samsung_cf.c:423:20: warning: incorrect type in argument 1 (different address spaces) drivers/ata/pata_samsung_cf.c:423:20: expected void const volatile [noderef] <asn:2>*addr drivers/ata/pata_samsung_cf.c:423:20: got void * drivers/ata/pata_samsung_cf.c:425:9: warning: incorrect type in argument 2 (different address spaces) drivers/ata/pata_samsung_cf.c:425:9: expected void volatile [noderef] <asn:2>*addr drivers/ata/pata_samsung_cf.c:425:9: got void * drivers/ata/pata_samsung_cf.c:448:37: warning: incorrect type in argument 1 (different address spaces) drivers/ata/pata_samsung_cf.c:448:37: expected void *s3c_ide_regbase drivers/ata/pata_samsung_cf.c:448:37: got void [noderef] <asn:2>*ide_addr drivers/ata/pata_samsung_cf.c:463:37: warning: incorrect type in argument 1 (different address spaces) drivers/ata/pata_samsung_cf.c:463:37: expected void *s3c_ide_regbase drivers/ata/pata_samsung_cf.c:463:37: got void [noderef] <asn:2>*ide_addr Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * ata: pata_arasan: Staticize local symbolsJingoo Han2013-08-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | These local symbols are used only in this file. Fix the following sparse warnings: drivers/ata/pata_arasan_cf.c:657:6: warning: symbol 'arasan_cf_error_handler' was not declared. Should it be static? drivers/ata/pata_arasan_cf.c:686:14: warning: symbol 'arasan_cf_qc_issue' was not declared. Should it be static? Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
| * sata_mv: Remove unneeded CONFIG_HAVE_CLK ifdefsEzequiel Garcia2013-07-301-14/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_HAVE_CLK is not selected, then all the clk API turn out into no-ops. In other words, there's no need to have the ifdefs. The only side-effect of this patch is the extra tiny kmalloc, but that's not enough reason to have such ugly ifdefs all around the code. tj: Slightly massaged comment as per Andrew Lunn. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Tejun Heo <tj@kernel.org>
| * ata: use dev_get_platdata()Jingoo Han2013-07-308-10/+10
| | | | | | | | | | | | | | | | Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * sata_mv: Remove unneeded forward declarationEzequiel Garcia2013-07-291-3/+0
| | | | | | | | | | | | | | | | These forward declarations are no longer needed, and are probably historical left-over. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: acpi: remove dead code for ata_acpi_(un)bindAaron Lu2013-07-251-4/+0
| | | | | | | | | | | | | | | | | | Commit 7381fe737 "libata-acpi: remove redundent code for power resource handling" removed ata_acpi_(un)bind but left their prototypes in libata.h, so remove them. Signed-off-by: Aaron Lu <aaron.lu@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: move 'struct ata_taskfile' and friends from ata.h to libata.hSergei Shtylyov2013-07-162-102/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | Move 'struct ata_taskfile', ata_prot_flags() and their friends from <linux/ata.h> to <linux/libata.h>. They were misplaced from the beginning, as <linux/ata.h> should cover ATA/ATAPI and related standards only -- to which the aforementioned structure and function have only remote relation. I would have moved 'enum ata_tf_protocols' closely related to 'struct ata_taskfile' but it unfortunately gets used by 'drivers/ide/ide-ioctls.c'... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | Merge branch 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wqLinus Torvalds2013-09-033-54/+57
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull workqueue updates from Tejun Heo: "Nothing interesting. All are doc / comment updates" * 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: workqueue: Correct/Drop references to gcwq in Documentation workqueue: Fix manage_workers() RETURNS description workqueue: Comment correction in file header workqueue: mark WQ_NON_REENTRANT deprecated
| * | workqueue: Correct/Drop references to gcwq in DocumentationLibin2013-08-211-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional changes. This patch fixes the post gcwq comments in Documentation/workqueue.txt. tj: Whitespace adjustments. Minor updates. Signed-off-by: Libin <huawei.libin@huawei.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * | workqueue: Fix manage_workers() RETURNS descriptionLibin2013-08-211-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. The comment of function manage_workers() RETURNS description is obvious wrong, same as the CONTEXT. Fix it. Signed-off-by: Libin <huawei.libin@huawei.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * | workqueue: Comment correction in file headerLibin2013-08-211-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. There are two worker pools for each cpu in current implementation (one for normal work items and the other for high priority ones). tj: Whitespace adjustments. Signed-off-by: Libin <huawei.libin@huawei.com> Signed-off-by: Tejun Heo <tj@kernel.org>
| * | workqueue: mark WQ_NON_REENTRANT deprecatedTejun Heo2013-07-302-13/+12
| |/ | | | | | | | | | | | | | | | | dbf2576e37 ("workqueue: make all workqueues non-reentrant") made WQ_NON_REENTRANT no-op but the following patches didn't remove the flag or update the documentation. Let's mark the flag deprecated and update the documentation accordingly. Signed-off-by: Tejun Heo <tj@kernel.org>
* | Merge branch 'for-3.12' of ↵Linus Torvalds2013-09-031-1/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu Pull single percpu update from Tejun Heo: "Just a single patch to update type verification macro for percpu accessors. Christoph is trying to replace __get_cpu_var() with this_cpu accessors which needs this update. There are still some issues to be resolved but eventually the conversion patches are likely to be routed through different trees, so I think it'd be convenient to merge this commit early" * 'for-3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu: percpu: Make __verify_pcu_ptr handle per cpu pointers to arrays
| * | percpu: Make __verify_pcu_ptr handle per cpu pointers to arraysChristoph Lameter2013-08-231-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __verify_pcpu_ptr() will cause a compilation failure if the type of the pointer is a pointer to a fixed array of objects. Adding zero to the pointer converts the type of pointer to that pointing to a single object of the array. Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | | Merge tag 'pci-v3.12-changes' of ↵Linus Torvalds2013-09-0345-1232/+1960
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI changes from Bjorn Helgaas: PCI device hotplug: - Use PCIe native hotplug, not ACPI hotplug, when possible (Neil Horman) - Assign resources on per-host bridge basis (Yinghai Lu) MPS (Max Payload Size): - Allow larger MPS settings below hotplug-capable Root Port (Yijing Wang) - Add warnings about unsafe MPS settings (Yijing Wang) - Simplify interface and messages (Bjorn Helgaas) SR-IOV: - Return -ENOSYS on non-SR-IOV devices (Stefan Assmann) - Update NumVFs register when disabling SR-IOV (Yijing Wang) Virtualization: - Add bus and slot reset support (Alex Williamson) - Fix ACS (Access Control Services) issues (Alex Williamson) Miscellaneous: - Simplify PCIe Capability accessors (Bjorn Helgaas) - Add pcibios_pm_ops for arch-specific hibernate stuff (Sebastian Ott) - Disable decoding during BAR sizing only when necessary (Zoltan Kiss) - Delay enabling bridges until they're needed (Yinghai Lu) - Split Designware support into Synopsys and Exynos parts (Jingoo Han) - Convert class code to use dev_groups (Greg Kroah-Hartman) - Cleanup Designware and Exynos I/O access wrappers (Seungwon Jeon) - Fix bridge I/O window alignment (Bjorn Helgaas) - Add pci_wait_for_pending_transaction() (Casey Leedom) - Use devm_ioremap_resource() in Marvell driver (Tushar Behera) * tag 'pci-v3.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits) PCI/ACPI: Fix _OSC ordering to allow PCIe hotplug use when available PCI: exynos: Add I/O access wrappers PCI: designware: Drop "addr" arg from dw_pcie_readl_rc()/dw_pcie_writel_rc() PCI: Remove pcie_cap_has_devctl() PCI: Support PCIe Capability Slot registers only for ports with slots PCI: Remove PCIe Capability version checks PCI: Allow PCIe Capability link-related register access for switches PCI: Add offsets of PCIe capability registers PCI: Tidy bitmasks and spacing of PCIe capability definitions PCI: Remove obsolete comment reference to pci_pcie_cap2() PCI: Clarify PCI_EXP_TYPE_PCI_BRIDGE comment PCI: Rename PCIe capability definitions to follow convention PCI: Warn if unsafe MPS settings detected PCI: Fix MPS peer-to-peer DMA comment syntax PCI: Disable decoding for BAR sizing only when it was actually enabled PCI: Add comment about needing pci_msi_off() even when CONFIG_PCI_MSI=n PCI: Add pcibios_pm_ops for optional arch-specific hibernate functionality PCI: Don't restrict MPS for slots below Root Ports PCI: Simplify MPS test for Downstream Port PCI: Remove unnecessary check for pcie_get_mps() failure ...
| * \ \ Merge branch 'pci/misc' into nextBjorn Helgaas2013-08-293-173/+184
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/misc: PCI/ACPI: Fix _OSC ordering to allow PCIe hotplug use when available PCI: exynos: Add I/O access wrappers PCI: designware: Drop "addr" arg from dw_pcie_readl_rc()/dw_pcie_writel_rc()
| | * | | PCI/ACPI: Fix _OSC ordering to allow PCIe hotplug use when availableNeil Horman2013-08-291-24/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the problem of acpiphp claiming slots that should be managed by pciehp, which may keep ExpressCard slots from working. The acpiphp driver claims PCIe slots unless the BIOS has granted us control of PCIe native hotplug via _OSC. Prior to v3.10, the acpiphp .add method (add_bridge()) was always called *after* we had requested native hotplug control with _OSC. But after 3b63aaa70e ("PCI: acpiphp: Do not use ACPI PCI subdriver mechanism"), which appeared in v3.10, acpiphp initialization is done during the bus scan via the pcibios_add_bus() hook, and this happens *before* we request native hotplug control. Therefore, acpiphp doesn't know yet whether the BIOS will grant control, and it claims slots that we should be handling with native hotplug. This patch requests native hotplug control earlier, so we know whether the BIOS granted it to us before we initialize acpiphp. To avoid reintroducing the ASPM issue fixed by b8178f130e ('Revert "PCI/ACPI: Request _OSC control before scanning PCI root bus"'), we run _OSC earlier but defer the actual ASPM calls until after the bus scan is complete. Tested successfully by myself. [bhelgaas: changelog, mark for stable] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=60736 Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org> CC: stable@vger.kernel.org # v3.10+ CC: Len Brown <lenb@kernel.org> CC: "Rafael J. Wysocki" <rjw@sisk.pl>
| | * | | PCI: exynos: Add I/O access wrappersSeungwon Jeon2013-08-291-69/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds wrappers for MMIO access to ELBI, PHY, and other registers. No functional change. [bhelgaas: changelog] Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jg1.han@samsung.com>
| | * | | PCI: designware: Drop "addr" arg from dw_pcie_readl_rc()/dw_pcie_writel_rc()Seungwon Jeon2013-08-291-80/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "dbi_addr" argument to dw_pcie_readl_rc() and dw_pcie_writel_rc() is redundant and misleading because we always have the "struct pcie_port" and we always want to use the address from there. This patch removes the argument and changes the callers to match. No functional change. [bhelgaas: changelog] Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jg1.han@samsung.com>
| * | | | Merge branch 'pci/misc' into nextBjorn Helgaas2013-08-287-91/+152
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/misc: PCI: Remove pcie_cap_has_devctl() PCI: Support PCIe Capability Slot registers only for ports with slots PCI: Remove PCIe Capability version checks PCI: Allow PCIe Capability link-related register access for switches PCI: Add offsets of PCIe capability registers PCI: Tidy bitmasks and spacing of PCIe capability definitions PCI: Remove obsolete comment reference to pci_pcie_cap2() PCI: Clarify PCI_EXP_TYPE_PCI_BRIDGE comment PCI: Rename PCIe capability definitions to follow convention PCI: Disable decoding for BAR sizing only when it was actually enabled PCI: Add comment about needing pci_msi_off() even when CONFIG_PCI_MSI=n PCI: Add pcibios_pm_ops for optional arch-specific hibernate functionality
| | * | | PCI: Remove pcie_cap_has_devctl()Bjorn Helgaas2013-08-281-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pcie_cap_has_devctl() does nothing, so remove it. Simplicity over consistency in this case. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
| | * | | PCI: Support PCIe Capability Slot registers only for ports with slotsBjorn Helgaas2013-08-281-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we allowed callers to access Slot Capabilities, Status, and Control for Root Ports even if the Root Port did not implement a slot. This seems dubious because the spec only requires these registers if a slot is implemented. It's true that even Root Ports without slots must have *space* for these slot registers, because the Root Capabilities, Status, and Control registers are after the slot registers in the capability. However, for a v1 PCIe Capability, the *semantics* of the slot registers are undefined unless a slot is implemented. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
| | * | | PCI: Remove PCIe Capability version checksBjorn Helgaas2013-08-281-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we relied on the PCIe r3.0, sec 7.8, spec language that says "For Functions that do not implement the [Link, Slot, Root] registers, these spaces must be hardwired to 0b," which means that for v2 PCIe capabilities, we don't need to check the device type at all. But it's simpler if we don't need to check the capability version at all, and I think the spec is explicit enough about which registers are required for which types that we can remove the version checks. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
| | * | | PCI: Allow PCIe Capability link-related register access for switchesBjorn Helgaas2013-08-281-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every PCIe device has a link, except Root Complex Integrated Endpoints and Root Complex Event Collectors. Previously we didn't give access to PCIe capability link-related registers for Upstream Ports, Downstream Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly returned zero. See PCIe spec r3.0, sec 7.8 and 1.3.2.3. Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com Reported-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
| | * | | PCI: Add offsets of PCIe capability registersBjorn Helgaas2013-08-281-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These offsets are not used, and in some cases are completely reserved even in the spec, but I'm adding them for completeness just to match the diagrams in the spec, e.g., PCIe spec r3.0, sec 7.8. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Tidy bitmasks and spacing of PCIe capability definitionsBjorn Helgaas2013-08-281-45/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The convention of showing bits in a mask of the full register width, e.g., "0x00000007" instead of "0x07" for a field in a 32-bit register, is common but not universal in this file. This patch makes it consistently used at least for the PCIe capability. Whitespace and zero-extension changes only; no functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Remove obsolete comment reference to pci_pcie_cap2()Bjorn Helgaas2013-08-281-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_pcie_cap2() was replaced by pcie_capability_read_word() and similar functions, so update the comment. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Clarify PCI_EXP_TYPE_PCI_BRIDGE commentBjorn Helgaas2013-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI_EXP_TYPE_PCI_BRIDGE is a *PCIe* function that is a bridge to PCI/PCI-X. See PCIe spec r3.0, sec 7.8.2. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Rename PCIe capability definitions to follow conventionBjorn Helgaas2013-08-273-27/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All other PCIe capability register fields include "PCI_EXP" + <reg-name> + <field-name>. This renames PCI_EXP_OBFF_MASK, PCI_EXP_IDO_REQ_EN, PCI_EXP_LTR_EN, and related fields using the same convention. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Samuel Ortiz <sameo@linux.intel.com> # for MFD driver
| | * | | PCI: Disable decoding for BAR sizing only when it was actually enabledZoltan Kiss2013-08-231-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We disable BARs while sizing them so we don't cause conflicts with other devices (see 253d2e5498 and bbffe43524). But if device decoding is already disabled before we size the BAR, we don't need to disable it again. [bhelgaas: changelog, add PCI_COMMAND_DECODING_ENABLE for readability] Signed-off-by: Zoltan Kiss <zoltan.kiss@citrix.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Add comment about needing pci_msi_off() even when CONFIG_PCI_MSI=nBjorn Helgaas2013-08-221-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per f5f2b13129 ("msi: sanely support hardware level msi disabling"), we want pci_msi_off() to work even if MSI support is not compiled into the kernel, and there are existing callers that use it when CONFIG_PCI_MSI=n. This adds a comment to that effect. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | PCI: Add pcibios_pm_ops for optional arch-specific hibernate functionalitySebastian Ott2013-08-222-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platforms may want to provide architecture-specific functionality when a PCI device is doing a hibernate transition. Add a weak symbol pcibios_pm_ops that architectures can override to do so. [bhelgaas: fold in return value checks from v2 patch] Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | | | Merge branch 'pci/yijing-mps-v8' into nextBjorn Helgaas2013-08-267-50/+52
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/yijing-mps-v8: PCI: Warn if unsafe MPS settings detected PCI: Fix MPS peer-to-peer DMA comment syntax PCI: Don't restrict MPS for slots below Root Ports PCI: Simplify MPS test for Downstream Port PCI: Remove unnecessary check for pcie_get_mps() failure PCI: Simplify pcie_bus_configure_settings() interface PCI: Drop "PCI-E" prefix from Max Payload Size message
| | * | | | PCI: Warn if unsafe MPS settings detectedYijing Wang2013-08-261-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a BIOS configures MPS incorrectly, devices may not work normally. For example, if a bridge has MPS set larger than an endpoint below it, the endpoint may discard packets. To help diagnose this issue, print a warning if we find an endpoint MPS setting different than that of the upstream bridge. [bhelgaas: changelog, "bridge" temporary, warning text] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=60799 Reported-by: Joe Jin <joe.jin@oracle.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jon Mason <jdmason@kudzu.us>
| | * | | | PCI: Fix MPS peer-to-peer DMA comment syntaxJon Mason2013-08-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct minor wording issue in MPS peer-to-peer comment. Noticed by Don Dutile. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | | | PCI: Don't restrict MPS for slots below Root PortsYijing Wang2013-08-221-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting with "pci=pcie_bus_safe", we previously limited the fabric MPS to 128 when we found: (1) A hotplug-capable Downstream Port ("dev->is_hotplug_bridge && pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT"), or (2) A hotplug-capable Root Port with a slot that was either empty or contained a multi-function device ("dev->is_hotplug_bridge && !list_is_singular(&dev->bus->devices)") Part (1) is valid, but part (2) is not. After a hot-add in the slot below a Root Port, we can reconfigure all MPS values in the fabric below the Root Port because the new device is the only thing below the Root Port and there are no active drivers. Therefore, there's no reason to limit the MPS for Root Ports, no matter what's in the slot. Test info: -+-[0000:40]-+-07.0-[0000:46]--+-00.0 Intel 82576 NIC \-00.1 Intel 82576 NIC 0000:40:07.0 Root Port bridge to [bus 46] (MPS supported=256) 0000:46:00.0 Endpoint (MPS supported=512) 0000:46:00.1 Endpoint (MPS supported=512) # echo 0 > /sys/bus/pci/slots/7/power # echo 1 > /sys/bus/pci/slots/7/power pcieport 0000:40:07.0: PCI-E Max Payload Size set to 256/ 256 (was 256) pci 0000:46:00.0: PCI-E Max Payload Size set to 256/ 512 (was 128) pci 0000:46:00.1: PCI-E Max Payload Size set to 256/ 512 (was 128) Before this change, we set MPS to 128 for the Root Port and both NICs because the slot contained a multi-function device and dev->is_hotplug_bridge && !list_is_singular(&dev->bus->devices) was true. After this change, we set it to 256. [bhelgaas: changelog, comments, split out upstream bridge check] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jon Mason <jdmason@kudzu.us>
| | * | | | PCI: Simplify MPS test for Downstream PortBjorn Helgaas2013-08-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCIe hotplug bridges are always either Root Ports or Downstream Ports. No other device type can have a PCIe link leading downstream to a slot. Root Ports don't have an upstream bridge, so "dev->is_hotplug_bridge && dev->bus->self" is true if and only if "dev" is a Downstream Port. That means we can simplify this by looking at the type of "dev" itself, without looking upstream at all. No functional change. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-12 23:19:45 +0000