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path: root/Documentation/ABI/testing/sysfs-bus-cxl
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* cxl/region: Add sysfs attribute for locality attributes of CXL regionsDave Jiang2024-03-121-0/+34
* cxl: Export sysfs attributes for memory device QoS classDave Jiang2023-12-221-0/+34
* Merge branch 'for-6.7/cxl-commited' into cxl/nextDan Williams2023-10-311-0/+15
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| * cxl: Add decoders_committed sysfs attribute to cxl_portDave Jiang2023-10-271-0/+15
* | cxl: Export QTG ids from CFMWS to sysfs as qos_class attributeDave Jiang2023-10-271-0/+15
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* cxl/memdev: Only show sanitize sysfs files when supportedDavidlohr Bueso2023-07-281-2/+4
* cxl/memdev: Improve sanitize ABI descriptionsDavidlohr Bueso2023-07-281-2/+11
* Merge branch 'for-6.5/cxl-fwupd' into for-6.5/cxlDan Williams2023-06-251-0/+11
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| * cxl: add a firmware update mechanism using the sysfs firmware loaderVishal Verma2023-06-251-0/+11
* | cxl/mem: Support Secure EraseDavidlohr Bueso2023-06-251-0/+10
* | cxl/mem: Wire up Sanitization supportDavidlohr Bueso2023-06-251-2/+19
* | cxl/mem: Introduce security state sysfs fileDavidlohr Bueso2023-06-251-0/+10
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* cxl/memdev: Add trigger_poison_list sysfs attributeAlison Schofield2023-04-231-0/+14
* cxl/region: Add volatile region creation supportDan Williams2023-02-101-11/+11
* cxl/region: Support empty uuids for non-pmem regionsDan Williams2023-02-101-1/+2
* cxl/region: Add a mode attribute for regionsDan Williams2023-02-101-0/+11
* cxl/Documentation: Update references to attributes added in v6.0Dan Williams2023-02-101-15/+15
* cxl/port: Link the 'parent_dport' in portX/ and endpointX/ sysfsDan Williams2023-01-251-0/+15
* cxl/hdm: Commit decoder state to hardwareDan Williams2022-07-251-0/+16
* cxl/region: Enable the assignment of endpoint decoders to regionsDan Williams2022-07-251-0/+19
* cxl/region: Allocate HPA capacity to regionsDan Williams2022-07-251-0/+29
* cxl/region: Add interleave geometry attributesBen Widawsky2022-07-251-0/+21
* cxl/region: Add a 'uuid' attributeBen Widawsky2022-07-251-0/+10
* cxl/region: Add region creation supportBen Widawsky2022-07-211-0/+25
* cxl/hdm: Add sysfs attributes for interleave ways + granularityBen Widawsky2022-07-211-0/+27
* cxl/hdm: Add support for allocating DPA to an endpoint decoderDan Williams2022-07-211-1/+36
* cxl/hdm: Add 'mode' attribute to decoder objectsDan Williams2022-07-211-0/+16
* Documentation/cxl: Use a double line break between entriesDan Williams2022-07-191-0/+16
* cxl/port: Read CDAT tableIra Weiny2022-07-191-0/+10
* cxl/Documentation: List attribute permissionsDan Williams2022-07-091-40/+41
* cxl/mem: Add the cxl_mem driverBen Widawsky2022-02-081-0/+9
* cxl/memdev: Add numa_node attributeDan Williams2022-02-081-0/+9
* cxl/pci: Emit device serial numberDan Williams2022-02-081-0/+9
* cxl/core: Emit modalias for CXL devicesDan Williams2022-02-081-0/+9
* cxl/acpi: Introduce cxl_decoder objectsDan Williams2021-06-091-0/+70
* cxl/acpi: Add downstream port data to cxl_port instancesDan Williams2021-06-091-0/+13
* cxl/acpi: Introduce the root of a cxl_port topologyDan Williams2021-06-091-0/+20
* cxl/mem: Register CXL memX devicesDan Williams2021-02-161-0/+26
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