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Documentation
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sysfs-bus-cxl
Commit message (
Expand
)
Author
Age
Files
Lines
*
cxl/hdm: Commit decoder state to hardware
Dan Williams
2022-07-25
1
-0
/
+16
*
cxl/region: Enable the assignment of endpoint decoders to regions
Dan Williams
2022-07-25
1
-0
/
+19
*
cxl/region: Allocate HPA capacity to regions
Dan Williams
2022-07-25
1
-0
/
+29
*
cxl/region: Add interleave geometry attributes
Ben Widawsky
2022-07-25
1
-0
/
+21
*
cxl/region: Add a 'uuid' attribute
Ben Widawsky
2022-07-25
1
-0
/
+10
*
cxl/region: Add region creation support
Ben Widawsky
2022-07-21
1
-0
/
+25
*
cxl/hdm: Add sysfs attributes for interleave ways + granularity
Ben Widawsky
2022-07-21
1
-0
/
+27
*
cxl/hdm: Add support for allocating DPA to an endpoint decoder
Dan Williams
2022-07-21
1
-1
/
+36
*
cxl/hdm: Add 'mode' attribute to decoder objects
Dan Williams
2022-07-21
1
-0
/
+16
*
Documentation/cxl: Use a double line break between entries
Dan Williams
2022-07-19
1
-0
/
+16
*
cxl/port: Read CDAT table
Ira Weiny
2022-07-19
1
-0
/
+10
*
cxl/Documentation: List attribute permissions
Dan Williams
2022-07-09
1
-40
/
+41
*
cxl/mem: Add the cxl_mem driver
Ben Widawsky
2022-02-08
1
-0
/
+9
*
cxl/memdev: Add numa_node attribute
Dan Williams
2022-02-08
1
-0
/
+9
*
cxl/pci: Emit device serial number
Dan Williams
2022-02-08
1
-0
/
+9
*
cxl/core: Emit modalias for CXL devices
Dan Williams
2022-02-08
1
-0
/
+9
*
cxl/acpi: Introduce cxl_decoder objects
Dan Williams
2021-06-09
1
-0
/
+70
*
cxl/acpi: Add downstream port data to cxl_port instances
Dan Williams
2021-06-09
1
-0
/
+13
*
cxl/acpi: Introduce the root of a cxl_port topology
Dan Williams
2021-06-09
1
-0
/
+20
*
cxl/mem: Register CXL memX devices
Dan Williams
2021-02-16
1
-0
/
+26