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path: root/arch/arm/mm/proc-v7-3level.S
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333Thomas Gleixner2019-06-051-13/+1
* ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setupHoeun Ryu2017-08-291-2/+1
* ARM: redo TTBR setup code for LPAERussell King2015-06-011-9/+5
* ARM: 8164/1: mm: clear SCTLR.HA instead of setting it for LPAEWill Deacon2014-09-251-2/+2
* ARM: 8132/1: LPAE: drop wrong carry flag correction after adding TTBR1_OFFSETKonstantin Khlebnikov2014-09-021-1/+0
* ARM: 8114/1: LPAE: load upper bits of early TTBR0/TTBR1Konstantin Khlebnikov2014-08-091-4/+3
* ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAESteven Capper2014-07-241-2/+7
* ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+Russell King2014-07-181-2/+3
* ARM: 8037/1: mm: support big-endian page tablesJianguo Wu2014-04-251-5/+13
* ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2Will Deacon2013-07-221-1/+1
* arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker2013-07-141-4/+0
* ARM: LPAE: accomodate >32-bit addresses for page table baseCyril Chemparathy2013-05-301-0/+8
* ARM: LPAE: factor out T1SZ and TTBR1 computationsCyril Chemparathy2013-05-301-21/+8
* ARM: LPAE: use phys_addr_t in switch_mm()Cyril Chemparathy2013-05-301-4/+12
* ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP insteadWill Deacon2013-04-031-1/+2
* ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.idBen Dooks2013-03-031-1/+1
* ARM: 7650/1: mm: replace direct access to mm->context.id with new macroBen Dooks2013-02-161-1/+1
* ARM: mm: introduce present, faulting entries for PAGE_NONEWill Deacon2012-11-091-0/+3
* ARM: mm: introduce L_PTE_VALID for page table entriesWill Deacon2012-11-091-1/+1
* ARM: LPAE: MMU setup for the 3-level page table formatCatalin Marinas2011-12-081-0/+150