| Commit message (Expand) | Author | Age | Files | Lines |
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| * | arm64: atomics: lse: Dereference matching size | Kees Cook | 2022-01-20 | 1 | -1/+1 |
| * | arm64: atomics: lse: define RETURN ops in terms of FETCH ops | Mark Rutland | 2021-12-14 | 1 | -34/+14 |
| * | arm64: atomics: lse: improve constraints for simple ops | Mark Rutland | 2021-12-14 | 1 | -12/+18 |
| * | arm64: atomics: lse: define ANDs in terms of ANDNOTs | Mark Rutland | 2021-12-14 | 1 | -30/+4 |
| * | arm64: atomics lse: define SUBs in terms of ADDs | Mark Rutland | 2021-12-14 | 1 | -122/+58 |
| * | arm64: atomics: format whitespace consistently | Mark Rutland | 2021-12-14 | 1 | -7/+7 |
| * | arm64: lse: fix LSE atomics with LLVM's integrated assembler | Sami Tolvanen | 2020-01-16 | 1 | -0/+19 |
| * | arm64: Mark functions using explicit register variables as '__always_inline' | Will Deacon | 2019-10-04 | 1 | -2/+4 |
| * | arm64: avoid using hard-coded registers for LSE atomics | Andrew Murray | 2019-08-29 | 1 | -29/+41 |
| * | arm64: atomics: avoid out-of-line ll/sc atomics | Andrew Murray | 2019-08-29 | 1 | -251/+114 |
| * | Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k... | Linus Torvalds | 2019-07-08 | 1 | -17/+17 |
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| | * | locking/atomic, arm64: Use s64 for atomic64 | Mark Rutland | 2019-06-03 | 1 | -17/+17 |
| * | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 2019-06-19 | 1 | -12/+1 |
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| * | Merge branch 'locking/atomics' into locking/core, to pick up WIP commits | Ingo Molnar | 2019-02-11 | 1 | -19/+19 |
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| | * | arm64, locking/atomics: Use instrumented atomics | Mark Rutland | 2018-11-01 | 1 | -19/+19 |
| * | | arm64: Avoid masking "old" for LSE cmpxchg() implementation | Will Deacon | 2018-12-07 | 1 | -2/+2 |
| * | | arm64: Avoid redundant type conversions in xchg() and cmpxchg() | Will Deacon | 2018-12-07 | 1 | -23/+23 |
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| * | arm64: lse: Add early clobbers to some input/output asm operands | Will Deacon | 2018-05-21 | 1 | -12/+12 |
| * | arm64: atomics: Remove '&' from '+&' asm constraint in lse atomics | Will Deacon | 2017-07-20 | 1 | -1/+1 |
| * | arm64: atomic_lse: match asm register sizes | Mark Rutland | 2017-05-09 | 1 | -2/+2 |
| * | arm64: lse: convert lse alternatives NOP padding to use __nops | Will Deacon | 2016-09-09 | 1 | -37/+27 |
| * | locking/atomic, arch/arm64: Implement atomic{,64}_fetch_{add,sub,and,andnot,o... | Will Deacon | 2016-06-16 | 1 | -0/+172 |
| * | locking/atomic, arch/arm64: Generate LSE non-return cases using common macros | Will Deacon | 2016-06-16 | 1 | -90/+32 |
| * | arm64: lse: deal with clobbered IP registers after branch via PLT | Ard Biesheuvel | 2016-02-26 | 1 | -19/+19 |
| * | arm64: cmpxchg_dbl: fix return value type | Lorenzo Pieralisi | 2015-11-05 | 1 | -1/+1 |
| * | arm64: atomics: implement native {relaxed, acquire, release} atomics | Will Deacon | 2015-10-12 | 1 | -77/+116 |
| * | arm64: lse: fix lse cmpxchg code indentation | Will Deacon | 2015-07-29 | 1 | -3/+3 |
| * | arm64: atomic64_dec_if_positive: fix incorrect branch condition | Will Deacon | 2015-07-27 | 1 | -1/+1 |
| * | arm64: atomics: implement atomic{,64}_cmpxchg using cmpxchg | Will Deacon | 2015-07-27 | 1 | -43/+0 |
| * | arm64: cmpxchg: avoid "cc" clobber in ll/sc routines | Will Deacon | 2015-07-27 | 1 | -2/+2 |
| * | arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU | Will Deacon | 2015-07-27 | 1 | -0/+43 |
| * | arm64: cmpxchg: patch in lse instructions when supported by the CPU | Will Deacon | 2015-07-27 | 1 | -0/+39 |
| * | arm64: atomics: patch in lse instructions when supported by the CPU | Will Deacon | 2015-07-27 | 1 | -109/+291 |
| * | arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomics | Will Deacon | 2015-07-27 | 1 | -0/+170 |
