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path: root/arch/riscv/include/asm/bug.h
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* riscv: Add dump stack in show_regsKefeng Wang2021-01-141-0/+1
* riscv: add macro to get instruction lengthZong Li2020-03-261-0/+8
* riscv: cleanup <asm/bug.h>Christoph Hellwig2019-10-231-13/+3
* Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2019-07-081-1/+1
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| * signal/riscv: Remove tsk parameter from do_trapEric W. Biederman2019-05-291-1/+1
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-051-9/+1
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* riscv: Add the support for c.ebreak check in is_valid_bugaddr()Vincent Chen2019-05-161-1/+6
* riscv: support trap-based WARN()Vincent Chen2019-05-161-10/+18
* RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macrosOlof Johansson2017-11-301-3/+3
* RISC-V: Init and Halt CodePalmer Dabbelt2017-09-261-0/+88