| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | RISC-V: Resurrect the MMIO timer implementation for M-mode systems | Palmer Dabbelt | 2020-09-19 | 1 | -0/+26 |
| * | RISC-V: Remove CLINT related code from timer and arch | Anup Patel | 2020-08-20 | 1 | -14/+0 |
| * | RISC-V: Add mechanism to provide custom IPI operations | Anup Patel | 2020-08-20 | 1 | -25/+0 |
| * | riscv: fix the IPI missing issue in nommu mode | Greentime Hu | 2020-03-18 | 1 | -4/+4 |
| * | riscv: provide native clint access for M-mode | Christoph Hellwig | 2019-11-17 | 1 | -0/+39 |
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index : linux.git | |
| Linux kernel mainline tree | Linus Torvalds |
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