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Commit message (
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Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2023-11-10
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-121
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+419
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riscv: Optimize bitops with Zbb extension
Xiao Wang
2023-11-09
1
-3
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+251
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riscv: Rearrange hwcap.h and cpufeature.h
Xiao Wang
2023-11-09
6
-94
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+87
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Merge patch "drivers: perf: Do not broadcast to other cpus when starting a co...
Palmer Dabbelt
2023-11-09
3
-2
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+43
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RISC-V: Probe misaligned access speed in parallel
Evan Green
2023-11-07
1
-1
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+0
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Merge patch series "riscv: Add remaining module relocations and tests"
Palmer Dabbelt
2023-11-07
1
-1
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+4
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riscv: Add remaining module relocations
Charlie Jenkins
2023-11-07
1
-1
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+4
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Merge patch series "riscv: tlb flush improvements"
Palmer Dabbelt
2023-11-06
3
-8
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+18
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riscv: Improve flush_tlb_kernel_range()
Alexandre Ghiti
2023-11-06
1
-5
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+6
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riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb
Alexandre Ghiti
2023-11-06
2
-3
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+3
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riscv: Improve tlb_flush()
Alexandre Ghiti
2023-11-06
2
-1
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+10
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riscv: mm: update T-Head memory type definitions
Jisheng Zhang
2023-11-05
1
-5
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+9
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Merge patch series "Improve PTDUMP and introduce new fields"
Palmer Dabbelt
2023-11-05
1
-2
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+2
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riscv: Improve PTDUMP to show RSW with non-zero value
Yu Chien Peter Lin
2023-11-05
1
-2
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+2
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RISC-V: capitalise CMO op macros
Conor Dooley
2023-11-05
2
-7
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+7
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Merge patch series "Add support to handle misaligned accesses in S-mode"
Palmer Dabbelt
2023-11-05
3
-0
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+41
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riscv: add support for PR_SET_UNALIGN and PR_GET_UNALIGN
Clément Léger
2023-11-01
1
-0
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+9
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riscv: report misaligned accesses emulation to hwprobe
Clément Léger
2023-11-01
1
-0
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+18
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riscv: add support for misaligned trap handling in S-mode
Clément Léger
2023-11-01
1
-0
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+14
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Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2023-11-08
15
-17
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+156
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RISC-V: hwprobe: Fix vDSO SIGSEGV
Andrew Jones
2023-11-02
1
-0
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+5
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Merge patch series "riscv: SCS support"
Palmer Dabbelt
2023-11-02
5
-4
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+111
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riscv: Use separate IRQ shadow call stacks
Sami Tolvanen
2023-10-27
1
-0
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+7
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riscv: Implement Shadow Call Stack
Sami Tolvanen
2023-10-27
3
-0
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+66
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riscv: Move global pointer loading to a macro
Sami Tolvanen
2023-10-27
1
-0
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+8
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riscv: Deduplicate IRQ stack switching
Sami Tolvanen
2023-10-27
2
-0
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+8
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riscv: VMAP_STACK overflow detection thread-safe
Deepak Gupta
2023-10-27
3
-4
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+22
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Merge patch "riscv: errata: improve T-Head CMO"
Palmer Dabbelt
2023-11-02
1
-9
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+9
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riscv: errata: prefix T-Head mnemonics with th.
Icenowy Zheng
2023-11-02
1
-7
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+7
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Merge patch series "RISC-V: ACPI improvements"
Palmer Dabbelt
2023-10-31
1
-0
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+6
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RISC-V: ACPI: RHCT: Add function to get CBO block sizes
Sunil V L
2023-10-26
1
-0
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+6
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riscv: mm: Update the comment of CONFIG_PAGE_OFFSET
Song Shuai
2023-10-31
1
-2
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+2
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riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause
Minda Chen
2023-10-31
1
-1
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+1
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riscv/mm: Fix the comment for swap pte format
Xiao Wang
2023-10-31
1
-1
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+1
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RISC-V: Provide pgtable_l5_enabled on rv32
Palmer Dabbelt
2023-10-31
2
-1
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+3
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RISC-V: hwprobe: Expose Zicboz extension and its block size
Andrew Jones
2023-09-21
2
-1
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+3
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RISC-V: Enable cbo.zero in usermode
Andrew Jones
2023-09-21
3
-0
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+18
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Merge tag 'mm-nonmm-stable-2023-11-02-14-08' of git://git.kernel.org/pub/scm/...
Linus Torvalds
2023-11-02
2
-0
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+13
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riscv: kdump: use generic interface to simplify crashkernel reservation
Baoquan He
2023-10-04
2
-0
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+13
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Merge tag 'mm-stable-2023-11-01-14-33' of git://git.kernel.org/pub/scm/linux/...
Linus Torvalds
2023-11-02
1
-0
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+12
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mm: delete checks for xor_unlock_is_negative_byte()
Matthew Wilcox (Oracle)
2023-10-18
1
-1
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+0
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riscv: implement xor_unlock_is_negative_byte
Matthew Wilcox (Oracle)
2023-10-18
1
-0
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+13
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds
2023-11-02
6
-1
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+63
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Merge tag 'kvm-riscv-6.7-1' of https://github.com/kvm-riscv/linux into HEAD
Paolo Bonzini
2023-10-31
6
-1
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+63
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RISC-V: KVM: Forward SBI DBCN extension to user-space
Anup Patel
2023-10-20
2
-0
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+2
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RISC-V: KVM: Allow some SBI extensions to be disabled by default
Anup Patel
2023-10-20
1
-0
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+4
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RISC-V: KVM: Change the SBI specification version to v2.0
Anup Patel
2023-10-20
1
-1
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+1
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RISC-V: Add defines for SBI debug console extension
Anup Patel
2023-10-20
1
-0
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+7
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RISC-V: KVM: Allow Zicond extension for Guest/VM
Anup Patel
2023-10-12
1
-0
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+1
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RISCV: KVM: Add sstateen0 to ONE_REG
Mayuresh Chitale
2023-10-12
1
-0
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+8
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