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* riscv: Add KASAN supportNick Hu2020-01-222-4/+6
* riscv: Less inefficient gcc tishift helpers (and export their symbols)Olof Johansson2020-01-181-18/+57
* riscv: fix compile failure with EXPORT_SYMBOL() & !MMULuc Van Oostenryck2019-12-271-0/+4
* riscv: add nommu supportChristoph Hellwig2019-11-171-6/+5
* riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig2019-11-051-6/+6
* riscv: Using CSR numbers to access CSRsBin Meng2019-08-301-6/+6
* RISC-V: Remove udivdi3Palmer Dabbelt2019-08-082-34/+0
* riscv: delay: use do_div() instead of __udivdi3()Paul Walmsley2019-08-081-1/+5
* Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2019-06-171-1/+1
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| * riscv: Fix udelay in RV32.Nick Hu2019-06-111-1/+1
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-055-45/+5
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
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* RISC-V: lib: minor asm cleanupOlof Johansson2018-12-212-48/+53
* RISC-V: lib: Fix build error for 64-bitOlof Johansson2018-11-121-1/+1
* RISC-V: Build tishift only on 64-bitZong Li2018-10-221-1/+2
* RISC-V: implement __lshrti3.Alex Guo2018-08-132-0/+43
* RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-111-2/+4
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| * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-091-2/+4
* | riscv: Fix the bug in memory access fixup codeAlan Kao2018-06-041-4/+9
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* RISC-V: Export some expected symbols for modulesOlof Johansson2017-11-301-0/+1
* RISC-V: Build InfrastructurePalmer Dabbelt2017-09-261-0/+6
* RISC-V: Device, timer, IRQs, and the SBIPalmer Dabbelt2017-09-261-0/+110
* RISC-V: Generic library routines and assemblyPalmer Dabbelt2017-09-264-0/+390
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