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* Merge tag 'riscv-for-linus-6.1-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2022-10-1424-90/+613
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| * RISC-V: Make port I/O string accessors actually workMaciej W. Rozycki2022-10-131-8/+8
| * RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo outputPalmer Dabbelt2022-10-131-0/+51
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| | * RISC-V: Add mvendorid, marchid, and mimpid to /proc/cpuinfo outputAnup Patel2022-10-031-0/+51
| * | RISC-V: Make mmap() with PROT_WRITE imply PROT_READPalmer Dabbelt2022-10-132-4/+2
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| | * | riscv: Allow PROT_WRITE-only mmap()Andrew Bresticker2022-09-221-3/+0
| | * | riscv: Make VM_WRITE imply VM_READAndrew Bresticker2022-09-221-1/+2
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| * | riscv: enable software resend of irqsConor Dooley2022-10-131-0/+1
| * | riscv: vdso: fix NULL deference in vdso_join_timens() when vforkJisheng Zhang2022-10-132-4/+10
| * | Merge patch series "Use composable cache instead of L2 cache"Palmer Dabbelt2022-10-132-1/+7
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| | * | riscv: Add cache information in AUX vectorGreentime Hu2022-10-132-1/+7
| * | | Merge patch series "Some style cleanups for recent extension additions"Palmer Dabbelt2022-10-133-29/+26
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| | * | | riscv: check for kernel config option in t-head memory types errataHeiko Stuebner2022-10-131-0/+3
| | * | | riscv: use BIT() marco for cpufeature probingHeiko Stuebner2022-10-131-2/+2
| | * | | riscv: use BIT() macros in t-head errata initHeiko Stuebner2022-10-131-2/+2
| | * | | riscv: drop some idefs from CMO initializationHeiko Stuebner2022-10-133-17/+14
| | * | | riscv: cleanup svpbmt cpufeature probingHeiko Stuebner2022-10-131-8/+5
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| * | | riscv: Pass -mno-relax only on lld < 15.0.0Fangrui Song2022-10-131-0/+2
| * | | RISC-V: Avoid dereferening NULL regs in die()Palmer Dabbelt2022-10-121-3/+6
| * | | Merge tag 'dt-for-palmer-v6.1-mw1' of git://git.kernel.org/pub/scm/linux/kern...Palmer Dabbelt2022-10-129-39/+498
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| | * | | riscv: dts: microchip: fix fabric i2c reg sizeConor Dooley2022-10-071-1/+1
| | * | | riscv: dts: microchip: update memory configuration for v2022.10Conor Dooley2022-09-271-2/+13
| | * | | riscv: dts: microchip: add a devicetree for aries' m100pfsevpConor Dooley2022-09-273-0/+225
| | * | | riscv: dts: microchip: add sevkit device treeVattipalli Praveen2022-09-273-0/+191
| | * | | riscv: dts: microchip: reduce the fic3 clock rateConor Dooley2022-09-271-1/+1
| | * | | riscv: dts: microchip: icicle: re-jig fabric peripheral addressesConor Dooley2022-09-271-4/+4
| | * | | riscv: dts: microchip: icicle: update pci address propertiesConor Dooley2022-09-271-5/+5
| | * | | riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsiConor Dooley2022-09-273-33/+58
| | * | | riscv: dts: microchip: add pci dma ranges for the icicle kitConor Dooley2022-09-272-2/+8
| | * | | riscv: dts: microchip: add qspi compatible fallbackConor Dooley2022-08-151-1/+1
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| * | | riscv: always honor the CONFIG_CMDLINE_FORCE when parsing dtbWenting Zhang2022-10-111-2/+2
* | | | Merge tag 'mm-nonmm-stable-2022-10-11' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds2022-10-121-5/+0
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| * | | | kernel: exit: cleanup release_thread()Kefeng Wang2022-09-111-5/+0
* | | | | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-10-1115-163/+260
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| * \ \ \ \ Merge tag 'kvm-riscv-6.1-1' of https://github.com/kvm-riscv/linux into HEADPaolo Bonzini2022-10-0320-176/+285
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| | * | | | | riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORKJisheng Zhang2022-10-021-0/+1
| | * | | | | RISC-V: KVM: Use generic guest entry infrastructureJisheng Zhang2022-10-022-12/+7
| | * | | | | RISC-V: KVM: Record number of signal exits as a vCPU statJisheng Zhang2022-10-022-0/+3
| | * | | | | RISC-V: KVM: add __init annotation to riscv_kvm_init()Xiu Jianfeng2022-10-021-1/+1
| | * | | | | RISC-V: KVM: Expose Zicbom to the guestAndrew Jones2022-10-022-2/+8
| | * | | | | RISC-V: KVM: Provide UAPI for Zicbom block sizeAndrew Jones2022-10-023-0/+11
| | * | | | | RISC-V: KVM: Make ISA ext mappings explicitAndrew Jones2022-10-021-11/+14
| | * | | | | RISC-V: KVM: Allow Guest use Zihintpause extensionMayuresh Chitale2022-10-022-0/+3
| | * | | | | RISC-V: KVM: Allow Guest use Svinval extensionAnup Patel2022-10-022-0/+3
| | * | | | | RISC-V: KVM: Use Svinval for local TLB maintenance when availableAnup Patel2022-10-022-12/+68
| | * | | | | RISC-V: Probe Svinval extension form ISA stringMayuresh Chitale2022-10-023-0/+6
| | * | | | | RISC-V: KVM: Change the SBI specification version to v1.0Anup Patel2022-10-021-2/+2
| | * | | | | riscv: KVM: Apply insn-def to hlv encodingsAndrew Jones2022-10-022-31/+25
| | * | | | | riscv: KVM: Apply insn-def to hfence encodingsAndrew Jones2022-10-022-112/+27
| | * | | | | riscv: Introduce support for defining instructionsAndrew Jones2022-10-022-0/+93
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