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* Merge tag 'kvmarm-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/...Paolo Bonzini2022-02-0578-796/+1877
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| * Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linuxLinus Torvalds2022-01-231-1/+0
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| | * include: move find.h from asm_generic to linuxYury Norov2022-01-151-1/+0
| * | Merge tag 'riscv-for-linus-5.17-mw1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-01-2239-412/+980
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| | * | RISC-V: nommu_virt: Drop unused SLAB_MERGE_DEFAULTPalmer Dabbelt2022-01-201-1/+0
| | * | RISC-V: Remove redundant err variableMinghao Chi2022-01-201-3/+1
| | * | riscv: dts: sifive unmatched: Add gpio poweroffRon Economos2022-01-201-0/+5
| | * | RISC-V: Do not use cpumask data structure for hartid bitmapAtish Patra2022-01-2011-136/+130
| | * | RISC-V: Move spinwait booting method to its own configAtish Patra2022-01-205-5/+30
| | * | RISC-V: Move the entire hart selection via lottery to SMPAtish Patra2022-01-201-2/+6
| | * | RISC-V: Use __cpu_up_stack/task_pointer only for spinwait methodAtish Patra2022-01-205-23/+30
| | * | RISC-V: Do not print the SBI version during HSM extension boot printAtish Patra2022-01-201-1/+1
| | * | RISC-V: Avoid using per cpu array for ordered bootingAtish Patra2022-01-204-15/+58
| | * | riscv: default to CONFIG_RISCV_SBI_V01=nHeinrich Schuchardt2022-01-201-1/+0
| | * | riscv: fix boolconv.cocci warningskernel test robot2022-01-191-2/+1
| | * | RISC-V: Introduce sv48 support without relocatable kernelPalmer Dabbelt2022-01-1917-188/+705
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| | | * | riscv: Explicit comment about user virtual address space sizeAlexandre Ghiti2022-01-191-0/+9
| | | * | riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfoAlexandre Ghiti2022-01-191-11/+12
| | | * | riscv: Implement sv48 supportAlexandre Ghiti2022-01-1912-44/+512
| | | * | riscv: Allow to dynamically define VA_BITSAlexandre Ghiti2022-01-194-14/+14
| | | * | riscv: Introduce functions to switch pt_opsAlexandre Ghiti2022-01-191-23/+51
| | | * | riscv: Split early kasan mapping to prepare sv48 introductionAlexandre Ghiti2022-01-193-51/+67
| | | * | riscv: Move KASAN mapping next to the kernel mappingAlexandre Ghiti2022-01-195-25/+32
| | | * | riscv: Get rid of MAXPHYSMEM configsAlexandre Ghiti2022-01-194-26/+2
| | * | | riscv: bpf: Fix eBPF's exception tablesJisheng Zhang2022-01-191-1/+1
| | * | | riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERNEL usageJisheng Zhang2022-01-191-8/+3
| | * | | riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead of #ifdefJisheng Zhang2022-01-191-9/+7
| | * | | riscv: mm: init: remove _pt_ops and use pt_ops directlyJisheng Zhang2022-01-191-4/+2
| | * | | riscv: mm: init: try best to use IS_ENABLED(CONFIG_64BIT) instead of #ifdefJisheng Zhang2022-01-191-27/+16
| | * | | riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP"Jisheng Zhang2022-01-191-2/+0
| * | | | Merge branch 'akpm' (patches from Andrew)Linus Torvalds2022-01-201-8/+2
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| | * | | mm: percpu: generalize percpu related configKefeng Wang2022-01-201-8/+2
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| * | | Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-01-1940-358/+493
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| | * | | RISC-V: Use SBI SRST extension when availableAnup Patel2022-01-112-0/+59
| | * | | riscv: mm: fix wrong phys_ram_base value for RV64Jisheng Zhang2022-01-091-1/+1
| | * | | RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=nSean Christopherson2022-01-093-18/+12
| | * | | riscv: head: remove useless __PAGE_ALIGNED_BSS and .balignJisheng Zhang2022-01-091-4/+0
| | * | | riscv: errata: alternative: mark vendor_patch_func __initdataJisheng Zhang2022-01-091-1/+2
| | * | | riscv: head: make secondary_start_common() staticJisheng Zhang2022-01-091-3/+2
| | * | | riscv: remove cpu_stop()Jisheng Zhang2022-01-092-9/+1
| | * | | riscv: try to allocate crashkern region from 32bit addressible memoryNick Kossifidis2022-01-091-4/+13
| | * | | riscv: use hart id instead of cpu id on machine_kexecNick Kossifidis2022-01-091-1/+2
| | * | | riscv: Don't use va_pa_offset on kdumpNick Kossifidis2022-01-091-11/+9
| | * | | riscv: dts: sifive: fu540-c000: Fix PLIC nodeGeert Uytterhoeven2022-01-091-2/+3
| | * | | riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible valuesGeert Uytterhoeven2022-01-091-1/+1
| | * | | riscv: dts: sifive: Group tuples in register propertiesGeert Uytterhoeven2022-01-091-6/+6
| | * | | riscv: dts: sifive: Group tuples in interrupt propertiesGeert Uytterhoeven2022-01-092-17/+18
| | * | | riscv: dts: microchip: mpfs: Group tuples in interrupt propertiesGeert Uytterhoeven2022-01-091-15/+16
| | * | | riscv: dts: microchip: mpfs: Fix clock controller nodeGeert Uytterhoeven2022-01-091-9/+0
| | * | | riscv: dts: microchip: mpfs: Fix reference clock nodeGeert Uytterhoeven2022-01-092-7/+9
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