summaryrefslogtreecommitdiffstats
path: root/arch/x86/events/intel
Commit message (Expand)AuthorAgeFilesLines
* perf/x86/intel/lbr: Zero the xstate buffer on allocationThomas Gleixner2021-06-241-1/+2
* perf/x86/intel/uncore: Fix M2M event umask for Ice Lake serverKan Liang2021-06-011-1/+2
* perf/x86/intel/uncore: Fix a kernel WARNING triggered by maxcpus=1Kan Liang2021-05-311-2/+4
* perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic contextLike Xu2021-05-181-6/+20
* perf/x86: Avoid touching LBR_TOS MSR for Arch LBRLike Xu2021-05-181-1/+1
* Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2021-04-2812-185/+1773
|\
| * perf/x86/cstate: Add Alder Lake CPU supportKan Liang2021-04-191-10/+29
| * perf/x86/intel/uncore: Add Alder Lake supportKan Liang2021-04-193-0/+139
| * perf/x86/intel: Add Alder Lake Hybrid supportKan Liang2021-04-192-1/+261
| * perf/x86/intel: Add attr_update for Hybrid PMUsKan Liang2021-04-191-6/+114
| * perf/x86: Register hybrid PMUsKan Liang2021-04-191-2/+91
| * perf/x86/intel: Factor out intel_pmu_check_extra_regsKan Liang2021-04-191-14/+21
| * perf/x86/intel: Factor out intel_pmu_check_event_constraintsKan Liang2021-04-191-35/+47
| * perf/x86/intel: Factor out intel_pmu_check_num_countersKan Liang2021-04-191-14/+24
| * perf/x86: Hybrid PMU support for extra_regsKan Liang2021-04-191-6/+9
| * perf/x86: Hybrid PMU support for event constraintsKan Liang2021-04-192-4/+6
| * perf/x86: Hybrid PMU support for unconstrainedKan Liang2021-04-191-1/+1
| * perf/x86: Hybrid PMU support for countersKan Liang2021-04-192-8/+14
| * perf/x86: Hybrid PMU support for intel_ctrlKan Liang2021-04-191-5/+9
| * perf/x86/intel: Hybrid PMU support for perf capabilitiesKan Liang2021-04-192-5/+19
| * perf/x86: Track pmu in per-CPU cpu_hw_eventsKan Liang2021-04-193-7/+8
| * perf/x86: Move cpuc->running into P4 specific codeKan Liang2021-04-161-3/+13
| * perf/x86/intel/uncore: Enable IIO stacks to PMON mapping for multi-segment SKXAlexander Antonov2021-04-023-34/+47
| * perf/x86/intel/uncore: Generic support for the MMIO type of uncore blocksKan Liang2021-04-024-0/+101
| * perf/x86/intel/uncore: Generic support for the PCI type of uncore blocksKan Liang2021-04-024-7/+177
| * perf/x86/intel/uncore: Rename uncore_notifier to uncore_pci_sub_notifierKan Liang2021-04-021-6/+14
| * perf/x86/intel/uncore: Generic support for the MSR type of uncore blocksKan Liang2021-04-024-10/+182
| * perf/x86/intel/uncore: Parse uncore discovery tablesKan Liang2021-04-024-8/+448
* | Merge tag 'x86_core_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2021-04-272-11/+10
|\ \
| * \ Merge tag 'v5.12-rc5' into WIP.x86/core, to pick up recent NOP related changesIngo Molnar2021-04-022-1/+4
| |\ \
| * | | perf/x86/intel/ds: Check return values of insn decoder functionsBorislav Petkov2021-03-151-5/+5
| * | | perf/x86/intel/ds: Check insn_get_length() retvalBorislav Petkov2021-03-151-6/+5
| | |/ | |/|
* | | Merge tag 'x86_cleanups_for_v5.13' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2021-04-267-20/+20
|\ \ \
| * | | x86: Fix various typos in comments, take #2Ingo Molnar2021-03-213-3/+3
| * | | x86: Remove unusual Unicode characters from commentsIngo Molnar2021-03-211-6/+6
| * | | Merge branch 'linus' into x86/cleanups, to resolve conflictIngo Molnar2021-03-212-1/+4
| |\ \ \ | | | |/ | | |/|
| * | | x86: Fix various typos in commentsIngo Molnar2021-03-185-11/+11
| | |/ | |/|
* | | perf/x86/kvm: Fix Broadwell Xeon stepping in isolation_ucodes[]Jim Mattson2021-04-221-1/+1
* | | perf/x86/intel/uncore: Remove uncore extra PCI dev HSWEP_PCI_PCU_3Kan Liang2021-04-211-35/+26
| |/ |/|
* | perf/x86/intel: Fix unchecked MSR access error caused by VLBR_EVENTKan Liang2021-03-161-0/+3
* | perf/x86/intel: Fix a crash caused by zero PEBS statusKan Liang2021-03-161-1/+1
|/
* perf/x86/intel: Set PERF_ATTACH_SCHED_CB for large PEBS and LBRKan Liang2021-03-061-1/+4
* perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[]Jim Mattson2021-02-101-0/+3
* perf/x86/intel: Support CPUID 10.ECX to disable fixed countersKan Liang2021-02-011-10/+24
* perf/x86/intel: Add perf core PMU support for Sapphire RapidsKan Liang2021-02-012-9/+416
* perf/x86/intel: Filter unsupported Topdown metrics eventKan Liang2021-02-011-2/+13
* perf/x86/intel: Factor out intel_update_topdown_event()Kan Liang2021-02-011-7/+13
* perf/core: Add PERF_SAMPLE_WEIGHT_STRUCTKan Liang2021-02-011-8/+9
* perf/intel: Remove Perfmon-v4 counter_freezing supportPeter Zijlstra2021-01-271-152/+0
* x86/perf: Use static_call for x86_pmu.guest_get_msrsLike Xu2021-01-271-20/+0